Chenming Hu

Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.

Advanced metal and dielectric barrier cap films for Cu low k interconnects

Abstract: Multi-layer SiN barrier film with high breakdown and low leakage is developed for Cu low k interconnects and is compared with the SiCNH barrier film used at previous technology nodes. Ultra-thin SiN barrier cap film also provides high conformality and fills recess in Cu lines observed post CMP. A significant enhancement in electro migration (EM) performance was obtained by selectively depositing Co on top of Cu lines followed by conformal multi-layer SiN barrier film. Further EM lifetime improvement is obtained by using a Co liner to form a wrap around structure with completely encapsulated Cu. An integrated in-situ preclean/ metal/dielectric cap chamber was used to avoid any oxidation of Cu/Co layers. Kinetic studies of CVD Co liner/Co cap samples show significant increase in EM activation energy (1.7 eV) over samples with dielectric only barrier film (0.9–1 eV). The complete wrap around structure with Co liner and Co cap shows improved device reliability.

In 0.53 Ga 0.47 As FinFET and GAA-FET With Remote-Plasma Treatment

Abstract: This letter presents a remote NH3/N2 plasma treatment after gate oxide deposition for improving the electrical characteristics and the reliability of In0.53Ga0.47As FinFET. The plasma treatment enhanced drive current ( ${I}_{\textsf {DS}}$ ), transconductance ( ${G}_{m}$ ), subthreshold swing (SS), flicker noise, and positive bias temperature lifetime, suggesting that this plasma treatment significantly improves the quality of the etched In0.53Ga0.47As channel interface. In0.53Ga0.47As FinFETs and gate-all-around FETs were fabricated with the proposed in situ remote-plasma treatment and characterized.

Punchthrough transient voltage suppressor for low-voltage electronics

Abstract: Transient voltage suppressors for electronic circuits with power supply voltage of 33 V or lower are urgently needed but unavailable due to excessive leakage of low-voltage reversed p-n diodes We analyzed several candidate device structures by using two-dimensional device simulation Adopting the punchthrough mechanism in an n/sup +/p/sup +/p/sup -/n/sup +/ structure rather than the traditional avalanche mechanism in a p/sup +/n/sup +/ structure, we can achieve low standoff voltage with excellent performances in low leakage current, low capacitance, and low clamping voltage The new device appears to be satisfactory for protecting future electronic systems with power supply voltage at least down to 15 V >

Extendibility of Cu Damascene to 0.1 μm Wide Interconnections

Abstract: We demonstrate the extendibility of the Cu damascene process to 0.1 μm wide lines. Cu interconnects, 0.1 - 1 μm wide, were fabricated by a damascene process that produced planarized lines and vias, imbedded in insulators. This process was defined by 1) trench and via formation in blanket dielectrics using e-beam lithography and reactive ion etching, 2) trench fill using a series of metal depositions, and 3) chemical mechanical polishing to remove the field metals. Physical vapor and ionized physical vapor deposition techniques were used to deposit the adhesion/diffusion barrier liner and the Cu seed layer, respectively. The main Cu conductor was deposited by an electroplating method. The width of lines and vias were varied from 0.1 μm to 1 μm while the thicknesses were held constant at 0.45 μm. A near bamboo-like structure was observed in the sub-μm wide lines. The effective resistivity of the Cu lines was found to be about 2.3 μΩ-cm and was independent of width after annealing at 400 °C.

Threshold Vacuum Switch (TVS) on 3D-stackable and 4F 2 cross-point bipolar and unipolar resistive random access memory

Abstract: A 3D stackable and bidirectional Threshold Vacuum Switching (TVS) selector using the same WO x material as the RRAM element is reported. It provides the highest reported current density of >108 A/cm2 and the highest selectivity of >105. Stress test at high current density indicates >108 cycle capability for Reset/Set operation. A mechanism based on recombination of oxygen-ions and vacancies is proposed for the observed volatile switching of TVS. Utilizing the threshold characteristics of the TVS selector, a two-step reading waveform offers potential for 3D-stackable and 4F2 cross-point RRAM applications.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

疟原虫var基因转换速率变化导致抗原变异[英]／Paul H, Robert P, Christodoulou Z, et al//Proc Natl Acad Sci U S A

Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1（PfPMP1）与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用，在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员，通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

High-κ gate dielectrics: Current status and materials properties considerations

Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

Design of Analog CMOS Integrated Circuits

Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

Prospects of Colloidal Nanocrystals for Electronic and Optoelectronic Applications

Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389