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Chenming Hu

Researcher at University of California, Berkeley

Publications -  1300
Citations -  60963

Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.

Papers
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Journal ArticleDOI

Carrier recombination through donors/acceptors in heavily doped silicon

TL;DR: In this article, carrier recombination in heavily doped semiconductors via shallow donor or acceptor states is analyzed and the results are in general agreement with experimental lifetime observations including the 1/n20 or 1/P20 dependence, and the insensitivity to temperature and to the dopant used.
Proceedings ArticleDOI

A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation

TL;DR: The approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies using BSIMPD as a foundation is presented, which unify the PD and FD models by the concept of body-source built-in potential lowering.
Journal ArticleDOI

Electromigration characteristics of TiN barrier layer material

TL;DR: In this article, the authors showed that resistances of the barrier layer of the TiN barrier are stable for 10 years if the temperature of the hottest spot in TiN is kept below 408/spl deg/C, which together with electrical sheet resistance and thermal resistance determine the acceptable current density in TiNs.
Journal ArticleDOI

Reliability and Copper Interconnections with Low Dielectric Constant Materials

Chenming Hu
- 01 Jan 1998 - 
TL;DR: In this article, a combination of good diffusion/adhesion barrier layers consisting of a metal liner plus the insulator Si3N4, and W stud/Si contacts resulted in a highly reliable IC chip.
Proceedings ArticleDOI

Global parameter extraction for a multi-gate MOSFETs compact model

TL;DR: In this article, a global I-V parameter extraction methodology for multi-gate MOSFET compact model is presented for the first time, where L-dependent properties are proposed to enable the accurate modeling of transistors over a wide range of gate length using a single set of model parameters.