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Author

Chenming Hu

Other affiliations: Motorola, National Chiao Tung University, Semtech  ...read more
Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.
Topics: MOSFET, Gate oxide, CMOS, Gate dielectric, Transistor


Papers
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Proceedings ArticleDOI
15 May 1989
TL;DR: A device model is described for the simulation of the effects of single-event and radiation phenomena on the operation of GaAs MESFETs to evaluate integrated-circuit designs and aid in the provision of adequate upset margins for various operating environments.
Abstract: A device model is described for the simulation of the effects of single-event and radiation phenomena on the operation of GaAs MESFETs. The model can be utilized in a circuit simulator to evaluate integrated-circuit designs and aid in the provision of adequate upset margins for various operating environments. Additional subcircuit construction is unnecessary since the electrical responses to the different phenomena are intrinsic to the device template. Example simulations using SPICE3 are described

8 citations

Journal ArticleDOI
TL;DR: In this paper, a monolithic 3D integrated complementary metal oxide semiconductor (CMOS) inverter using layered transition metal dichalcogenide semiconductor N-channel and P-channel (PMOS) MOSFETs is presented.
Abstract: We experimentally demonstrate a monolithic 3D integrated complementary metal oxide semiconductor (CMOS) inverter using layered transition metal dichalcogenide semiconductor N-channel (NMOS) and P-channel (PMOS) MOSFETs, which are sequentially integrated on two levels. The two devices share a common gate. Molybdenum disulphide and tungsten diselenide are used as channel materials for NMOS and PMOS, respectively, with an ON-to-OFF current ratio (ION/IOFF) greater than 106 and electron and hole mobilities of 37 and 236 cm2/Vs, respectively. The voltage gain of the monolithic 3D inverter is about 45 V/V at a supply voltage of 1.5 V and a gate length of 1 μm. This is the highest reported gain at the smallest gate length and the lowest supply voltage for any 3D integrated CMOS inverter using any layered semiconductor.

8 citations

Proceedings ArticleDOI
11 Jun 2002
TL;DR: In this article, poly-SiGe was investigated as the gate material for CMOS transistors with ultra-thin HfO/sub 2/ gate dielectric, which reduced the gate depletion effect, and also resulted in thinner EOT of the gate Dielectric after 1000/spl deg/C annealing.
Abstract: Poly-SiGe is investigated as the gate material for CMOS transistors with ultra-thin HfO/sub 2/ gate dielectric. Compared with poly-Si, poly-SiGe reduces the gate depletion effect, and also results in thinner EOT of the gate dielectric after 1000/spl deg/C annealing, with low gate leakage maintained. The Si interface quality is also better than that achieved with surface nitridation, which has been used to reduce EOT. Therefore, the use of poly-SiGe as the gate material is effective for improving the performance of ultra-thin HfO/sub 2/ CMOS transistors.

8 citations

Proceedings ArticleDOI
11 Apr 1994
TL;DR: In this paper, the theoretical correlation between SOI MOSFET's gate current and substrate current was investigated and shown to be a weak function of thin-film SOI thickness (T/sub si/) and E/sub m/ can be significantly lower than in a bulk device with drain junction depth (X/sub j/) comparable to T/sub Si/.
Abstract: Previous conflicting reports concerning fully-depleted SOI device hot electron reliability is partially due to misunderstanding over the maximum channel electric field (E/sub m/). Experimental results using SOI MOSFETs with body contacts indicate that E/sub m/ is just a weak function of thin-film SOI thickness (T/sub si/) and E/sub m/ can be significantly lower than in a bulk device with drain junction depth (X/sub j/) comparable to T/sub si/ The theoretical correlation between SOI MOSFET's gate current and substrate current are experimentally confirmed. This provides a means (I/sub G/) of studying E, in SOI device without body contacts. Both N- and P-MOSFETs can have better hot-carrier reliability than comparable bulk devices. Thin film SOI MOSFETs have better prospects for meeting breakdown voltage and hot-electron reliability requirements than previously thought. >

8 citations


Cited by
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Journal ArticleDOI

[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

28 Jul 2005
TL;DR: PfPMP1)与感染红细胞、树突状组胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作�ly.
Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1(PfPMP1)与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员,通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

18,940 citations

Journal ArticleDOI
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

5,711 citations

Book
01 Jan 1999
TL;DR: The analysis and design techniques of CMOS integrated circuits that practicing engineers need to master to succeed can be found in this article, where the authors describe the thought process behind each circuit topology, but also consider the rationale behind each modification.
Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

4,826 citations

Journal ArticleDOI
TL;DR: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each that are among the hottest research topics of the last decades.
Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389

3,720 citations