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Author

Chenming Hu

Other affiliations: Motorola, National Chiao Tung University, Semtech  ...read more
Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.
Topics: MOSFET, Gate oxide, CMOS, Gate dielectric, Transistor


Papers
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Journal ArticleDOI
TL;DR: In this paper, the authors present a novel technique based on synchrotron X-ray nanobeam absorption spectroscopy capable of mapping the three main phases of HZO (i.e., orthorhombic (O), tetragonal (T), and monoclinic (M)).
Abstract: Hf1-xZrxO2 (HZO) is a complementary metal-oxide-semiconductor (CMOS)-compatible ferroelectric (FE) material with considerable potential for negative capacitance field-effect transistors, ferroelectric memory, and capacitors. At present, however, the deployment of HZO in CMOS integrated circuit (IC) technologies has stalled due to issues related to FE uniformity. Spatially mapping the FE distribution is one approach to facilitating the optimization of HZO thin films. This paper presents a novel technique based on synchrotron X-ray nanobeam absorption spectroscopy capable of mapping the three main phases of HZO (i.e., orthorhombic (O), tetragonal (T), and monoclinic (M)). The practical value of the proposed methodology when implemented in conjunction with kinetic-nucleation modeling is demonstrated by our development of a T → O annealing (TOA) process to optimize HZO films. This process produces an HZO film with the largest polarization values (Ps = 64.5 μC cm-2; Pr = 35.17 μC cm-2) so far, which can be attributed to M-phase suppression followed by low-temperature annealing for the induction of a T → O phase transition.

6 citations

Patent
02 Jun 1990
TL;DR: In this paper, a process for forming an oxide isolated semiconductor wafer, which can include the formation of an associated high voltage transistor, is described. But this process is restricted to a single IC chip.
Abstract: A process is disclosed for forming an oxide isolated semiconductor wafer which can include the formation of an associated high voltage transistor. The same wafer can include a plurality of low voltage transistors which can be connected in the form of circuitry that can control the high voltage transistor. Thus, a single IC chip can be fabricated for a power control function.

6 citations

Proceedings ArticleDOI
01 Aug 1997
TL;DR: This report, based on the most recent analytical and experimental studies of CMOS scaling and gate delay models, reexamines the fundamental design quantities such as driving current, I/sub dsat/, propagation delay, t/sub pd/, and switching energy, E, and investigates device optimization issues in deep sub-micron regime.
Abstract: This report, based on the most recent analytical and experimental studies of CMOS scaling and gate delay models, reexamines the fundamental design quantities such as driving current, I/sub dsat/, propagation delay, t/sub pd/, and switching energy, E, and investigates device optimization issues in deep sub-micron regime. Empirical I/sub dsat/ equations and device optimization guidelines with gate oxide, channel length and power supply scaling as well as interconnect loading are extracted.

6 citations

Proceedings ArticleDOI
15 Dec 2016
TL;DR: In this article, a compact model for independent double gate MOSFET (BSIM-IMG) with updated mobility model is presented for Germanium On Insulator (GeOI) devices.
Abstract: Recently, experimental Germanium CMOS devices and circuit are reported for advanced technology nodes for the first time. In this paper, we have modeled Germanium On Insulator (GeOI) device with industry standard compact model for independent double gate MOSFET (BSIM-IMG) with updated mobility model. It is shown that BSIM-IMG with updated mobility model accurately captures static characteristics for both n-channel and p-channel devices, and reproduces experimental CMOS inverter characteristics. This is the first time, when a compact model is validated on experimental CMOS circuit operation of GeOI.

6 citations

Proceedings ArticleDOI
05 May 1996
TL;DR: The results show that the model can pass most benchmarks suggested for a model used in circuit simulation by SEMATECH recently, and ensures good scalability and accuracy.
Abstract: We present an accurate and unified MOSFET model with benchmark test results for analog/digital circuit simulation. The results show that the model can pass most benchmarks suggested for a model used in circuit simulation by SEMATECH recently, and ensures good scalability and accuracy. The model has been implemented in HSpice, Spectre, SmartSpice and Spice3e2.

6 citations


Cited by
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Journal ArticleDOI

[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

28 Jul 2005
TL;DR: PfPMP1)与感染红细胞、树突状组胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作�ly.
Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1(PfPMP1)与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员,通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

18,940 citations

Journal ArticleDOI
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

5,711 citations

Book
01 Jan 1999
TL;DR: The analysis and design techniques of CMOS integrated circuits that practicing engineers need to master to succeed can be found in this article, where the authors describe the thought process behind each circuit topology, but also consider the rationale behind each modification.
Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

4,826 citations

Journal ArticleDOI
TL;DR: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each that are among the hottest research topics of the last decades.
Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389

3,720 citations