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Author

Chenming Hu

Other affiliations: Motorola, National Chiao Tung University, Semtech  ...read more
Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.
Topics: MOSFET, Gate oxide, CMOS, Gate dielectric, Transistor


Papers
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Journal ArticleDOI
TL;DR: In this article, the threshold voltage of the device is a function of its gate voltage, i.e., as the gate voltage increases, the voltage drops resulting in a much higher current drive than standard MOSFET for low power supply voltages.
Abstract: In this paper, we propose a novel operation of a MOSFET that is suitable for ultra-low voltage (0.6 V and below) VLSI circuits. Experimental demonstration was carried out in a Silicon-On-Insulator (SOI) technology. In this device, the threshold voltage of the device is a function of its gate voltage, i.e., as the gate voltage increases the threshold voltage (V/sub t/) drops resulting in a much higher current drive than standard MOSFET for low-power supply voltages. On the other hand, V/sub t/ is high at V/sub gs/=0, therefore the leakage current is low. We provide extensive experimental results and two-dimensional (2-D) device and mixed-mode simulations to analyze this device and compare its performance with a standard MOSFET. These results verify excellent inverter dc characteristics down to V/sub dd/=0.2 V, and good ring oscillator performance down to 0.3 V for Dynamic Threshold-Voltage MOSFET (DTMOS).

533 citations

Journal ArticleDOI
TL;DR: In this paper, a model for silicon dioxide breakdown characterization, valid for a thickness range between 25 /spl Aring/ and 130 /spl Ring/, is presented, which provides a method for predicting dielectric lifetime for reduced power supply voltages and aggressively scaled oxide thicknesses.
Abstract: In this paper, we present a model for silicon dioxide breakdown characterization, valid for a thickness range between 25 /spl Aring/ and 130 /spl Aring/, which provides a method for predicting dielectric lifetime for reduced power supply voltages and aggressively scaled oxide thicknesses. This model, based on hole injection from the anode, accurately predicts Q/sub BD/ and t/sub BD/ behavior including a fluence in excess of 10/sup 7/ C/cm/sup 2/ at an oxide voltage of 2.4 V for a 25 /spl Aring/ oxide. Moreover, this model is a refinement of and fully complementary with the well known 1/E model, while offering the ability to predict oxide reliability for low voltages. >

530 citations

Journal ArticleDOI
TL;DR: In this article, a new technique is presented which allows the frequency-independent device capacitance to be accurately extracted from impedance measurements at two frequencies for a 1.7 nm SiO/sub 2/ capacitor.
Abstract: As oxide thickness is reduced below 2.5 nm in MOS devices, both series and shunt parasitic resistances become significant in capacitance-voltage (C-V) measurements. A new technique is presented which allows the frequency-independent device capacitance to be accurately extracted from impedance measurements at two frequencies. This technique is demonstrated for a 1.7 nm SiO/sub 2/ capacitor.

492 citations

Book
15 Mar 2009
TL;DR: In this article, the authors proposed a band model for quantitative analysis of semiconductors, which can be used to obtain the energy gap, E-K diagrams allowing the determination of e ective masses, analysis of the energy levels with in the gap and the conduction/valence bands etc.
Abstract: 3. Electrons and holes are the major characters in the play and carry opposite charge. Their mass however is altered from the mass of an electron in vacuum. The altered mass is called e ective mass, mn and mp 4. The band model is the tool required for quantitative analysis of semiconductors. From this model one can get the energy gap, E-K diagrams allowing the determination of e ective masses, analysis of the energy levels with in the gap and the conduction/valence bands etc

447 citations

Journal ArticleDOI
TL;DR: In this article, a self-aligned double-gate MOSFET structure (FinFET) is used to suppress the short-channel effects, which shows good performance down to a gate-length of 18 nm.
Abstract: High-performance PMOSFETs with sub-50-nm gate-length are reported. A self-aligned double-gate MOSFET structure (FinFET) is used to suppress the short-channel effects. This vertical double-gate SOI MOSFET features: 1) a transistor channel which is formed on the vertical surfaces of an ultrathin Si fin and controlled by gate electrodes formed on both sides of the fin; 2) two gates which are self-aligned to each other and to the source/drain (S/D) regions; 3) raised S/D regions; and 4) a short (50 nm) Si fin to maintain quasi-planar topology for ease of fabrication. The 45-nm gate-length p-channel FinFET showed an I/sub dsat/ of 820 /spl mu/A//spl mu/m at V/sub ds/=V/sub gs/=1.2 V and T/sub ox/=2.5 mm. Devices showed good performance down to a gate-length of 18 nm. Excellent short-channel behavior was observed. The fin thickness (corresponding to twice the body thickness) is found to be critical for suppressing the short-channel effects. Simulations indicate that the FinFET structure can work down to 10 nm gate length. Thus, the FinFET is a very promising structure for scaling CMOS beyond 50 nm.

443 citations


Cited by
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Journal ArticleDOI

[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

28 Jul 2005
TL;DR: PfPMP1)与感染红细胞、树突状组胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作�ly.
Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1(PfPMP1)与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员,通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

18,940 citations

Journal ArticleDOI
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

5,711 citations

Book
01 Jan 1999
TL;DR: The analysis and design techniques of CMOS integrated circuits that practicing engineers need to master to succeed can be found in this article, where the authors describe the thought process behind each circuit topology, but also consider the rationale behind each modification.
Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

4,826 citations

Journal ArticleDOI
TL;DR: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each that are among the hottest research topics of the last decades.
Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389

3,720 citations