Chenming Hu

Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.

Correlation between substrate and gate currents in MOSFET's

Abstract: A correlation between substrate and gate currents in MOSFET's is described and analyzed. Both of these currents are the result of hot-electron mechanisms. Theory for these mechanisms has been applied to derive an expression for gate current in terms of substrate current and parameters that can be calculated from processing data and bias conditions. The theory is successfully applied to a series of n-channel MOSFET's with a range of geometries and bias values.

Impact of Cu microstructure on electromigration reliability

Abstract: The effect of Cu microstructure on electromigration (EM) has been investigated. A variation in the Cu grain size distributions between wafers was achieved by adjusting the wafer annealing process step after Cu electroplating and before Cu chemical mechanical polishing. Void growth morphology was observed by in-situ and ex-situ scanning electron microscope (SEM) techniques. The Cu lifetime and mass flow in samples with bamboo, near bamboo, bamboo-polycrystalline mixture, and polycrystalline grain structures were measured. The introduction of polycrystalline Cu line grain structure in fine lines for the 65 nm node technology and beyond markedly reduced the Cu EM reliability. The smaller Cu grain size distribution resulted in a shorter EM lifetime and a faster mass flow. The EM activation energies for Cu along Cu/amorphous a-SiCxNyHz interface and grain boundary were found to be 0.95 and 0.79 eV, respectively.

A novel Silicon-On-Insulator (SOI) MOSFET for ultra low voltage operation

Abstract: To extend the lower bound of power supply voltage, we propose a variable threshold voltage MOSFET (VTMOS) built on silicon-on-insulator (SOI). Threshold voltage of VTMOS drops as gate voltage is raised, resulting in a much higher current drive than regular MOSEET, at low Vdd. On the other hand, V/sub t/ is high at V/sub gs/=O, thus the leakage current is low. The SOI devices used in the study were built on SIMOX wafers. A four terminal layout was used to provide separate source, drain, gate, and body contacts.

Characterization of VLSI circuit interconnect heating and failure under ESD conditions

Abstract: The high current and ESD effects on VLSI interconnect metallization have been characterized and a model for heating under ESD conditions is presented. It is shown that thermal breakdown occurs when the resistances increase by a factor of >3.6 due to melting of metal lines. After the metal is molten, the thermal stress is required to exceed the fracture strength of the oxide/nitride layers in order for the overlying dielectric to be cracked and an open circuit to take place. The critical failure current is strongly influenced by the metal thickness and thermal capacity. It is shown that for current pulses below the failure threshold, the metal will return to its original solid state with no change in DC resistance, but it will have a lower electromigration lifetime. This is a potential latent failure. The model is applied to derive relations between critical current, line width and pulse width for determining design guidelines for ESD and I/O buffer interconnects.

Losses of a nematic liquid-crystal optical waveguide*

Abstract: The absorption and scattering losses at 6328 A in MBBA thin-film waveguides were measured. The absorption loss was studied with a thermal-lens technique and was found to be highly dichroic. Thermal self-focusing was observed for the ordinary ray. The measured scattering losses were between 15 and 40 dB cm−1, depending on the polarization and the liquid-crystal orientation. A modified bulk-scattering loss caused by the thermal fluctuation of the long-range-crystal ordering is calculated and compared with the measurements.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

疟原虫var基因转换速率变化导致抗原变异[英]／Paul H, Robert P, Christodoulou Z, et al//Proc Natl Acad Sci U S A

Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1（PfPMP1）与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用，在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员，通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

High-κ gate dielectrics: Current status and materials properties considerations

Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

Design of Analog CMOS Integrated Circuits

Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

Prospects of Colloidal Nanocrystals for Electronic and Optoelectronic Applications

Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389