Chenming Hu

Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.

Ferroelectric nonvolatile dynamic random access memory device

Abstract: A dynamic random access memory cell is described which can operate either in volatile or nonvolatile mode. When operating in a volatile mode, the memory cell operates in the same manner as a conventional dynamic random access memory cell, that is, with charge being stored and discharged from a capacitor in the memory cell. Upon receipt of a suitable signal, however, the cell can be switched to a nonvolatile mode of operation. In this mode of operation, a pulse applied to the capacitor can place a ferroelectric film in the desired polarization state to represent the binary data. The ferroelectric film will hold its polarization state until the data is recalled and the cell reverts to operating in a volatile mode.

Electromigration comparison of selective CVD cobalt capping with PVD Ta(N) and CVD cobalt liners on 22nm-groundrule dual-damascene Cu interconnects

Abstract: Alternate metallization schemes for copper interconnect using selective CVD Co capping at the 22nm technology node are investigated. Control splits fabricated with PVD Ta(N) barrier/liner layers and CuMn alloy seedlayers are compared against interconnects fabricated using a PVD TaN barrier/CVD Co liner scheme with selective CVD Co capping. Secondary ion mass spectroscopy (SIMS) studies of PVD TaN barrier/CVD Co liner structures indicates that top-surface segregation of the Mn-dopant in alloy seedlayers is suppressed in the presence of the CVD Co Liner. Alternate metal capping in the form of selective CVD Co layers is evaluated in combination with CVD Co liners. Good electrical yields are obtained in-line with the Co liner/Co cap scheme. The PVD TaN/Co-Liner/Selective CVD Co cap combination is seen to have greatly enhanced electromigration performance over PVD Ta(N)/PVD CuMn controls, with T50 fail times for the former being ~100x longer than the controls. Kinetics studies of the CVD Co liner/selective Co cap samples show electromigration activation energies of 1.7 eV, a substantial enhancement over the 1.0 eV obtained for the PVD Ta(N)/CuMn controls.

Circuit reliability simulator-oxide breakdown module

Abstract: A computer program which generates statistics about circuit failures due to MOS oxide breakdown has been developed The program, CORS (Circuit Oxide Reliability Simulator), predicts the probability of circuit failure as a function of operating time, temperature, power supply voltage, and input waveforms It consists of a preprocessor and postprocessor for SPICE CORS calculates the probability of failure by using the node voltages provided by SPICE and oxide defect statistics provided by the user The effect of burn-in on oxide reliability can also be simulated CORS is linked to a hot electron and an electromigration reliability simulator Simulation results are presented >

Complementary field-effect transistors and methods of manufacture

Abstract: A complementary FET and a method of manufacture is provided. The complementary FET utilizes a substrate having a surface layer with a crystal orientation. Tensile stress, which increases performance of the NMOS FETs, is added by silicided source/drain regions, tensile-stress film, shallow trench isolations, inter-layer dielectric, or the like.

Physical, Electrical, and Reliability Characterization of Ru for Cu Interconnects

Abstract: Thin film characterization, electrical performance, and preliminary reliability of physical vapor-deposited (PVD) TaN/chemical vapor-deposited (CVD) Ru bilayer were carried out to evaluate its feasibility as a liner layer for back-end of line (BEOL) Cu-low k integration. Adhesion and barrier strength were studied using 4-point bend, X-ray diffraction (XRD), and triangular voltage sweep (TVS) techniques. Electrical yields and line/via resistances were measured at both single and dual damascene levels, with PVD TaN/Ta liner layer as a baseline control. Reliability studies included electromigration (EM) and current-voltage (I-V) breakdown tests

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

疟原虫var基因转换速率变化导致抗原变异[英]／Paul H, Robert P, Christodoulou Z, et al//Proc Natl Acad Sci U S A

Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1（PfPMP1）与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用，在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员，通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

High-κ gate dielectrics: Current status and materials properties considerations

Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

Design of Analog CMOS Integrated Circuits

Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

Prospects of Colloidal Nanocrystals for Electronic and Optoelectronic Applications

Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389