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Author

Chenming Hu

Other affiliations: Motorola, National Chiao Tung University, Semtech  ...read more
Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.
Topics: MOSFET, Gate oxide, CMOS, Gate dielectric, Transistor


Papers
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Proceedings ArticleDOI
01 Dec 1986
TL;DR: In this article, a simple physical model is presented that adequately explains most of these observed high-field effects, including the asymmetry in device properties, and Implications of the wear-overlap phenomena on future process and device designs are discussed.
Abstract: Recent studies showed that minor structural differences in the gate-to-drain (source) overlap of a MOSFET has unexpectedly strong influence on its characteristics. As the overlap is weakened, the drain drive degrades, the substrate and gate currents show abnormal behaviors, and the device lifetime suffers. A simple physical model is presented that adequately explains most of these observed high-field effects, including the asymmetry in device properties. Implications of the wear-overlap phenomena on future process and device designs are discussed.

31 citations

Journal ArticleDOI
TL;DR: In this paper, a simulator using coupled Schrodinger equation, Poisson equation and Fermi - Dirac statistics to analyse inversion-layer quantization has been shown to match the measured C - V data of thin-gate-oxide metal-oxide semiconductor (MOS) capacitors closely.
Abstract: A simulator using the coupled Schrodinger equation, the Poisson equation and Fermi - Dirac statistics to analyse inversion-layer quantization has been shown to match the measured C - V data of thin-gate-oxide metal-oxide semiconductor (MOS) capacitors closely. This simulator is used to study in detail the effects of bias voltage, oxide thickness and doping concentration on the charge centroid and from this a simple empirical model for the dc charge centroid of the inversion layer is proposed. This model predicts the inversion charge density in terms of , and explicitly and can be used to estimate transistor current in device engineering and circuit simulation models.

31 citations

Journal ArticleDOI
TL;DR: In this paper, the dependence of the work function of Mo on deposition and annealing conditions is investigated, and it is shown that the work functions of Mo can be varied over the range of 4.0-5.0V by a combination of suitable post-deposition implantation and annaling schemes.
Abstract: Molybdenum has several properties that make it attractive as a CMOS gate electrode material. The high melting point (∼2610°C) and low coefficient of thermal expansion (5×10−6/°C, at 20 °C) are well suited to withstand the thermal processing budgets normally encountered in a CMOS fabrication process. Mo is among the most conductive refractory metals and provides a significant reduction in gate resistance as compared with doped polysilicon. Mo is also stable in contact with SiO2 at elevated temperatures. In order to minimize short-channel effects in bulk CMOS devices, the gate electrodes must have work functions that correspond to Ec (NMOS) and Ev (PMOS) in Si. This would normally require the use of two metals with work functions differing by about 1V on the same wafer and introduce complexities associated with selective deposition and/or etching. In this paper, the dependence of the work function of Mo on deposition and annealing conditions is investigated. Preliminary results indicate that the work function of Mo can be varied over the range of 4.0-5.0V by a combination of suitable post-deposition implantation and annealing schemes. Mo is thus a promising candidate to replace polysilicon gates in deep sub-micron CMOS technology. Processing sequences which might allow the work function of Mo to be stabilized on either end of the Si energy band gap are explored.

31 citations

Journal ArticleDOI
TL;DR: In this article, the effects of hot-carrier stressing on the drain breakdown voltage of MOSFETs have been studied, and the mechanism of fast recovery is low-level hole injection at high V/sub D/.
Abstract: The recovery of threshold voltage due to high drain or gate voltage and the effects of hot-carrier stressing on the drain breakdown voltage of MOSFETs have been studied. A high oxide field causes slow recovery through tunneling detrapping of electrons in both p- and n-MOSFETs. For n-MOSFETs the mechanism of fast recovery is low-level hole injection at high V/sub D/. Hot-carrier stressing at high V/sub G/ causes the drain breakdown voltage to decrease (walk-in). This results in enhanced hold injection, thus increasing the rate of subsequent recovery of V/sub t/. The breakdown voltage increases and then decreases when stressed at low gate voltages. >

31 citations

Journal ArticleDOI
TL;DR: In this paper, the gate work function was used to determine the gate tunneling current in such thin gate oxides, under negative gate bias (inversion bias), it was found that the source/drain terminal serves as a source of holes for small V/sub g/ value, and as gate bias increases (more negative), it becomes a hole sink.
Abstract: P/sup +/ poly-Si and poly-Si/sub 0.75/Ge/sub 0.25/-gated PMOS transistors with ultrathin gate oxides of 25 and 29 /spl Aring/ were used for this study. The difference in the gate work function was used to determine the mechanisms of gate tunneling current in such thin gate oxides, Under negative gate bias (inversion bias), it was found that the source/drain terminal serves as a source of holes for small V/sub g/ value, and as gate bias increases (more negative), it becomes a hole sink. These observations can be interpreted in terms of two competing mechanisms. For the first time, hole direct tunneling is reported, Hole direct tunneling is the dominant mechanism for -2 V

31 citations


Cited by
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Journal ArticleDOI

[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

28 Jul 2005
TL;DR: PfPMP1)与感染红细胞、树突状组胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作�ly.
Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1(PfPMP1)与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员,通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

18,940 citations

Journal ArticleDOI
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

5,711 citations

Book
01 Jan 1999
TL;DR: The analysis and design techniques of CMOS integrated circuits that practicing engineers need to master to succeed can be found in this article, where the authors describe the thought process behind each circuit topology, but also consider the rationale behind each modification.
Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

4,826 citations

Journal ArticleDOI
TL;DR: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each that are among the hottest research topics of the last decades.
Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389

3,720 citations