Chenson Chen

TL;DR: In this paper, the authors describe the rationale and development of a wafer-scale three-dimensional (3D) integrated circuit technology and the essential elements of the 3D technology are integrated circuit fabrication on silicon-on-insulator wafers, precision waferwafer alignment using an in-house developed alignment system, low-temperature wafer wafer bonding to transfer and stack active circuit layers, and interconnection of the circuit layers with dense-vertical connections with sub-Omega 3-D via resistances.

TL;DR: In this article, a 1024/spl times/1024 integrated image sensor with 8 /spl mu/m pixels, developed with 3D fabrication in 150 mm wafer technology, is presented.

TL;DR: In this paper, high-quality imaging without uniformity correction has been demonstrated in the long-wavelength infrared (LWIR) spectral band for 400*400-element focal plane arrays consisting of Ge/sub 0.44/Si/sub 1.56/ detectors with a cutoff wavelength of 9.3 mu m and monolithic charged-coupled device readout circuitry.

TL;DR: A 64times64 laser-radar (ladar) detector array with 50mum pixel size measures the arrival times of single photons using Geiger-mode avalanche photodiodes (APD).

TL;DR: In this paper, the authors explore the limitations of laser-interferometer-based mark-detection metrology, and contrast this with ways that fiducial grids could be used to solve a variety of metrology problems, including measuring process-induced distortions in substrates, measuring patterning distortions in pattern-mastering systems, such as laser and e-beam writers; and measuring field distortions and alignment errors in steppers and scanners.