Chewn-Pu Jou

TL;DR: In this article, an integrated circuit structure includes a semiconductor substrate of a first conductivity type; and a depletion region in the semiconductor substrategies, where the depletion region includes a first portion directly over the deep well region and a second portion directly under the deep-well region.

TL;DR: In this article, the integrated fan-out wafer-level packaging (InFO-WLP) technology with state-of-the-art inductors (quality factor of 42 and self-resonance frequency of 16 GHz) was demonstrated for heterogeneous integration of digital and radio frequency (RF) systems.

TL;DR: An integrated on-chip matching network serves to both PA and low-noise transconductance amplifier, thus allowing a 1-pin direct antenna connection with no external band-selection filters.

TL;DR: A new transmitter architecture for ultra-low power radios in which the most energy-hungry RF circuits operate at a supply just above a threshold voltage of CMOS transistors, and an all-digital PLL employs a digitally controlled oscillator with switching current sources to reduce supply voltage and power without sacrificing its startup margin.

TL;DR: In this paper, an integrated circuit device with a fin structure disposed over the semiconductor substrate, coupled with a gate structure over the base portion of the fin structure, is described, where the collector is a first doped region including a first type dopant, and coupled with the collector portion for electrically biasing the collector.