Bio: Chia-Hua Chang is an academic researcher from National Taiwan University. The author has contributed to research in topics: Dielectric & Saturation current. The author has an hindex of 4, co-authored 6 publications receiving 47 citations.
TL;DR: In this paper, a dielectric stack with Al2O3/HfO2/SiO2 (18 nm/16 nm/25 nm) trilayer structure prepared by low temperature in situ natural oxidation during dc sputtering is investigated.
Abstract: In this work, a dielectric stack with Al2O3/HfO2/SiO2 (18 nm/16 nm/25 nm) trilayer structure prepared by low temperature in situ natural oxidation during dc sputtering is investigated We study the electrical characteristics, including the dielectric leakage of 10−8 A/cm2 at Vg=−2 V, the current transport mechanism and trap distributions through the trilayer dielectric stack The Fowler–Nordheim barrier height of the prepared Al2O3 (ϕFN,Al2O3) was extracted as 306±015 eV The current variation ratios [ΔJg/Jg(0)] during constant voltage stressing were found to decrease with raising gate stress voltages for the trilayer stack in comparison with that [ΔJg/Jg(0)] increase with raising gate stress voltages for the two-layer HfO2/SiO2 stack Shallow traps located in HfO2 were supposed to be major trapping centers within the trilayer stack The proposed method of in situ oxidation during dc sputtering is of merit and low in process temperature The trilayer dielectric stacks are an alternative option for no
TL;DR: In this paper, the saturation current of metal-oxide-semiconductor (MOS) capacitors with added HfO2 film is shown to saturate within 0.5 V.
Abstract: In this paper, metal-oxide-semiconductor (MOS) capacitors fabricated on p-type silicon substrate with hafnium oxide (HfO2 ) film added on silicon dioxide (SiO2) were demonstrated as reliable temperature-detecting devices. The saturation current of MOS (p) capacitor with added HfO2 film is easy to saturate within 0.5 V. From 40 degC to 90degC, each increase of 10degC almost doubles the saturation current. The C-V curves show that the interface properties of Si/SiO2 and SiO2/HfO 2 are good. It was also shown that these devices are reliable even though they had been electrically stressed at various temperatures (30degC~90degC) for 15 000 s. They have the potential to be integrated into the circuits as temperature detectors in the era of ultralarge-scale-integration technology
TL;DR: In this article, a tilted-substrate sputtering technique, which provides various film thicknesses in one processing step, was proposed and useful for the characterization of charge distribution in low-temperature dielectric stacks with anodic oxide interfacial layer (ANO-IL).
Abstract: Hafnium oxide dielectric stacks with anodic oxide interfacial layer (ANO-IL) were investigated under low-temperature consideration. A tilted-substrate sputtering technique, which provides various film thicknesses in one processing step, was proposed and useful for the characterization of charge distribution. It was found that charges existed in the HfO2/ANO-IL were smaller than that in HfO2/rapid-thermal-oxidation IL. The prepared samples exhibit good electrical characteristics, including small electrical hysteresis (< 10 mV), low leakage current, high effective dielectric breakdown field of 12.7 MV/cm, and maximum operating voltages of -2.74 V at 25degC and -2.32 V at 125degC for EOT = 2.3 nm stacks under a ten-year lifetime evaluation. The results suggest that the quality of IL in the dielectric stack is a critical reliability issue and that ANO is provided as a candidate for IL consideration of low-temperature dielectric stacks.
TL;DR: In this paper, the physical and electrical characteristics of low-temperature processing hafnium oxide (HfO2) films are studied, and a simple cost-effective room temperature process was introduced to prepare high-k HfO 2 dielectrics.
Abstract: In this paper, the physical and electrical characteristics of low-temperature-processing hafnium oxide (HfO2) films are studied. A simple cost-effective room-temperature process was introduced to prepare high-k HfO2 dielectrics. A novel technique of direct oxidation of an ultrathin Hf metal by nitric acid, followed by rapid thermal annealing in N2 is demonstrated. The prepared HfO2 gate dielectrics show good uniformity, low leakage currents, high breakdown field, and superior reliability under electrical stressing. The long-term ten-year lifetime was also evaluated by a time-dependent-dielectric-breakdown analysis to project the maximum operation voltage of -1.8 V for HfO2 gate stacks. This low-temperature oxidation technology for preparing high-quality high-k HfO2 dielectrics is promising for flat-panel-display applications.
TL;DR: In this article, the saturation currents of metal-oxide-semiconductor (MOS) capacitors were investigated on n-and p-type silicon substrates to investigate the generation mechanism of the saturation current.
Abstract: Rapid thermal oxidations were simultaneously performed on n- and p-type silicon substrates to investigate the saturation currents of metal-oxide-semiconductor (MOS) capacitors. For MOS capacitors on n-type Si substrates, the curves of capacitance versus gate voltage (C-V) show almost no fixed charge, no lateral nonuniformity, and little interface trap density (Dit). The mechanism of the generation of the saturation current is recombination, and was investigated by electroluminescence. Also, the saturation current decreases as the oxide becomes thicker. However, the oxidation temperature must be sufficiently high to form high-quality oxide on p-type Si substrate. Controlled by minority carrier generation, the saturation current of the MOS (p) capacitor also depends on Dit, suboxide, and bulk trap density. The saturation current increases with the thickness of the oxide. The generation mechanism of the saturation currents of MOS (p) capacitors was also investigated by observing their dependencies on tempera...
TL;DR: In this paper, the growth rate of the HfO2 films depends on the deposition pressure (P) as P-1.75, which is explained by a diffusion model of the thermalized atoms in high-pressure sputtering.
Abstract: Hafnium oxide films were deposited by high pressure reactive sputtering using different deposition pressures and times. The composition, morphology, and optical properties of the films, together with the sputtering process growth kinetics were investigated using heavy ion elastic recoil detection analysis, Fourier transform infrared spectroscopy, ultraviolet-visible-near infrared spectroscopy, x-ray diffraction, and transmission electron microscopy. The films showed a monoclinic polycrystalline structure, with a grain size depending on the deposition pressure. All films were slightly oxygen rich with respect to stoichiometric HfO2 and presented a significant amount of hydrogen (up to 6 at. %), which is attributed to the high affinity for moisture of the HfO2 films. The absorption coefficient was fitted to the Tauc law, obtaining a band gap value of 5.54 eV. It was found that the growth rate of the HfO2 films depends on the deposition pressure (P) as P-1.75. This dependence is explained by a diffusion model of the thermalized atoms in high-pressure sputtering. Additionally, the formation of an interfacial silicon oxide layer when the films were grown on silicon was observed, with a minimum thickness for deposition pressures around 1.2 mbars. This interfacial layer was formed mainly during the initial stages of the deposition process, with only a slight increase in thickness afterwards. These results are explained by the oxidizing action of the oxygen plasma and the diffusion of oxygen radicals and hydroxyl groups through the polycrystalline HfO2 film. Finally, the dielectric properties of the HfO2/SiO2 stacks were studied by means of conductance and capacitance measurements on Al/HfO2/SiO2/Si devices as a function of gate voltage and ac frequency signal.
TL;DR: In this article, the authors studied the deep depletion behaviors at the structure of Si/SiO2 with various equivalent oxide thicknesses (EOTs) and comprehensively studied by magnified capacitance versus gate voltage (C-V) curves of metal-oxide-semiconductor (P-substrate) capacitors.
Abstract: The deep depletion behaviors at the structure of Si/SiO2 with various equivalent oxide thicknesses (EOTs) are comprehensively studied by magnified capacitance versus gate voltage (C-V) curves of metal-oxide-semiconductor (P-substrate) capacitors in this work. According to the correlation between inversion tunneling current and deep depletion, it was found that the initiation voltage of deep depletion phenomenon increases with EOT (2.8–3.1 nm). After the constant voltage stress, the early occurrence of initiation voltage of deep depletion is observed after oxide breakdown. In addition, the uniform area ratio concept is proposed for the electrical characterization of deep depletion via local depletion capacitance model. It was novel for the evaluation of interfacial property between dielectric and Si substrate.
TL;DR: In this paper, the temperature dependence of C-V and I-V characteristics in p-type MOS capacitors with HfO2/SiO2 dielectric stacks was investigated, which was caused by increased effective oxide thickness, oxide trapped charge density, and interfacial density of state with rising temperature during bias temperature stress.
Abstract: We investigated the temperature dependence of C–V and I–V characteristics in p-type Metal Oxide Semiconductor (MOS) capacitors with HfO2/SiO2 dielectric stacks Dramatic degradation in the C–V characteristics at/over the measurement temperature of 125 °C was observed, which was caused by the increased effective oxide thickness, oxide trapped charge density, and interfacial density of state (Dit) with rising temperature during bias temperature stress In the accumulation region, the leakage current density displayed strong temperature dependence in the −3 V
01 Jan 2013-Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena
TL;DR: In this paper, the effects of the oxidant source (H2O or O3) and postdeposition anneal on the charging phenomena and the generation of new defects during electrical stress were investigated.
Abstract: In this work, the authors focus on the charge trapping behavior of Al2O3 layers deposited by atomic layer deposition. The goal is to give an insight into the effects of the oxidant source (H2O or O3) and the postdeposition anneal on the charging phenomena and the generation of new defects during electrical stress. For this purpose, current–voltage, capacitance–voltage, and conductance–voltage characteristics of Al/Al2O3/p-Si capacitors are analyzed before and after constant voltage stress and several phenomena such as the generation of neutral traps in the bulk dielectric, slow states, interface states, and charge trapping related degradation during the electrical stress are investigated. Finally, the impact of the oxidant source on the Al2O3 layer reliability is discussed.
TL;DR: In this paper, the N-In codoped p-type ZnO films were deposited by ultrasonic spray pyrolysis on a (111)-oriented silicon substrate with a thin oxide layer.
Abstract: Photodiodes with a p -ZnO/oxide/ n -Si substrate structure were fabricated. The N-In codoped p -type ZnO films were deposited by ultrasonic spray pyrolysis on a (111)-oriented silicon substrate with a thin oxide layer. A photocurrent of ~ 4.99 × 10 -5 A was measured at a reverse bias of 1 V, and a photocurrent to dark current contrast ratio of almost five orders of magnitude was found. The photodiode responses exhibited three regions of behaviour: around 400 nm, between 400 nm–700 nm, and between 700 nm–1000 nm, denoted as regions A, B, and C, respectively. Region A corresponds to band-to-band absorption in the ZnO film, region B to band-to-deep level absorption in the ZnO film, and region C to band edge absorption in the Si substrate.