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Chia-Wei Chen

Bio: Chia-Wei Chen is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Passivation & Wafer. The author has an hindex of 7, co-authored 14 publications receiving 228 citations.

Papers
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Journal ArticleDOI
TL;DR: In this article, a carrier-selective tunnel oxide passivated rear contact for high-efficiency screen-printed large area n-type front junction crystalline Si solar cells was proposed.
Abstract: This paper reports on the implementation of carrier-selective tunnel oxide passivated rear contact for high-efficiency screen-printed large area n-type front junction crystalline Si solar cells. It is shown that the tunnel oxide grown in nitric acid at room temperature (25°C) and capped with n+ polysilicon layer provides excellent rear contact passivation with implied open-circuit voltage iVoc of 714 mV and saturation current density J0b′ of 10.3 fA/cm2 for the back surface field region. The durability of this passivation scheme is also investigated for a back-end high temperature process. In combination with an ion-implanted Al2O3-passivated boron emitter and screen-printed front metal grids, this passivated rear contact enabled 21.2% efficient front junction Si solar cells on 239 cm2 commercial grade n-type Czochralski wafers. Copyright © 2016 John Wiley & Sons, Ltd.

83 citations

Journal ArticleDOI
TL;DR: In this article, a combination of optimized front and back dielectrics, rear surface finish, oxide thickness, fixed oxide charge, and interface quality provided effective surface passivation without parasitic shunting.
Abstract: This paper describes the cell design and technology on large-area (239 cm2) commercial grade Czochralski Si wafers using industrially feasible oxide/nitride rear passivation and screen-printed local back contacts. A combination of optimized front and back dielectrics, rear surface finish, oxide thickness, fixed oxide charge, and interface quality provided effective surface passivation without parasitic shunting. Increasing the rear oxide thickness from 40 to 90 A in conjunction with reducing the surface roughness from 1.3 to 0.2 μm increased the Voc from 640 mV to 656 mV. Compared with 18.6% full aluminum back surface field (Al-BSF) reference cell, local back-surface field (LBSF) improved the back surface reflectance (BSR) from 65% to 93% and lowered the back surface recombination velocity (BSRV) from 310 to 130 cm/s. Two-dimensional computer simulations were performed to optimize the size, shape, and spacing of LBSF regions to obtain good fill factor (FF). Model calculations show that 20% efficiency cells can be achieved with further optimization of local Al-BSF cell structure and improved screen-printed contacts.

45 citations

Journal ArticleDOI
TL;DR: In this article, a carrier selective electron and hole recombination velocities to match the measured Jorear of the TOPCon region as well as all the light IV values of the cell were modeled.
Abstract: Carrier selective passivated contacts composed of thin oxide, n + polycrystalline Si and metal on top of a n-Si absorber can significantly lower the recombination current density (Jorear ≤8 fA/cm2) under the contact while providing excellent specific contact resistance (5–10 mΩ-cm2); 25.1% efficient small area cells with photolithography front contacts on boron doped selective emitter and Fz wafers have been achieved by Fraunhofer ISE using their tunnel oxide passivated contact (TOPCon) approach. This paper shows a methodology to model such passivated contact cells using Sentaurus device model, which involves replacing the TOPCon region by carrier selective electron and hole recombination velocities to match the measured Jorear of the TOPCon region as well as all the light IV values of the cell. We first validated the methodology by modeling a 24.9% reference cell. The model was then extended to assess the efficiency potential of large area TOPCon cells on commercial grade n-type Cz material with screen-printed front contacts. To use realistic input parameters, a 21% n-type PERT cell was fabricated on Cz wafer (5 Ω-cm, 1.5-ms lifetime). Modeling showed that the cell efficiency will improve to only 21.6% if the back of this cell is replaced by the above TOPCon, and the performance is limited by the homogenous emitter. Efficiency was then modeled to improve to 22.6% with the implementation of selective emitter (150/20 Ω/sq). Finally, it is shown that screen printing of 40-µm-wide lines and improved bulk material (10 Ω-cm, 3-ms lifetime) can raise the single side TOPCon Cz cell efficiency to 23.2%. Copyright © 2016 John Wiley & Sons, Ltd.

28 citations

Proceedings ArticleDOI
14 Jun 2015
TL;DR: In this paper, the fabrication and optimization of tunnel oxide passivated contact with crystallized n+ polycrystalline Si (poly-Si) for high-efficiency large-area n-type front-junction Si solar cells was presented.
Abstract: This paper presents the fabrication and optimization of tunnel oxide passivated contact with crystallized n+ polycrystalline Si (poly-Si) for high-efficiency large-area n-type front-junction Si solar cells. Starting with a baseline process, we optimized (a) the PECVD deposition precursor SiH4/PH3 flow rate, (b) the H2 gas volume ratio, (c) the crystallization annealing temperature, (d) the tunnel oxide growth temperature, and (e) the deposition power to achieve the highest implied Voc. This resulted in an implied Voc of 730 mV, Job' of 4.3 fA/cm2, and implied fill factor (FF) of >84.5% with symmetric structure on n-type Cz substrate (∼4 Ωcm, 170µm), indicating excellent interface passivation quality of tunnel oxide/n+ poly-Si contact. Applying a high dose ion-implanted boron emitter passivated with Al2O3 and screen-printed and fired Ag/Al front contact, 21.2% cell efficiency was achieved on 239 cm2 commercial grade n-type Cz wafers.

25 citations

Proceedings ArticleDOI
08 Jun 2014
TL;DR: In this article, the Direct Gas to Wafer (DGW) technology was used to produce high quality epitaxial kerfless mono crystalline n-type and p-type silicon wafers.
Abstract: This paper demonstrates the Direct Gas to Wafer™ technology to produce high quality epitaxial kerfless mono crystalline n-type and p-type silicon wafers. The key aspects of the approach involve anodic etching to form porous Si release layer, growing epitaxial wafers, separation of the epitaxial wafers from the substrate and substrate reuse. The advantages of epitaxial wafers over conventional Cz wafers are discussed. With 156 mm epitaxial wafers, p-type PERC cell has achieved an efficiency of 19.7% and n-type cell has achieved an efficiency above 20%

14 citations


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Journal ArticleDOI
TL;DR: In this paper, aluminum oxide (Al2O3) nanolayers synthesized by atomic layer deposition (ALD) have been used for the passivation of p-and n-type crystalline Si (c-Si) surfaces.
Abstract: The reduction in electronic recombination losses by the passivation of silicon surfaces is a critical enabler for high-efficiency solar cells. In 2006, aluminum oxide (Al2O3) nanolayers synthesized by atomic layer deposition (ALD) emerged as a novel solution for the passivation of p- and n-type crystalline Si (c-Si) surfaces. Today, high efficiencies have been realized by the implementation of ultrathin Al2O3 films in laboratory-type and industrial solar cells. This article reviews and summarizes recent work concerning Al2O3 thin films in the context of Si photovoltaics. Topics range from fundamental aspects related to material, interface, and passivation properties to synthesis methods and the implementation of the films in solar cells. Al2O3 uniquely features a combination of field-effect passivation by negative fixed charges, a low interface defect density, an adequate stability during processing, and the ability to use ultrathin films down to a few nanometers in thickness. Although various methods can be used to synthesize Al2O3, this review focuses on ALD—a new technology in the field of c-Si photovoltaics. The authors discuss how the unique features of ALD can be exploited for interface engineering and tailoring the properties of nanolayer surface passivation schemes while also addressing its compatibility with high-throughput manufacturing. The recent progress achieved in the field of surface passivation allows for higher efficiencies of industrial solar cells, which is critical for realizing lower-cost solar electricity in the near future.

684 citations

Journal ArticleDOI
TL;DR: In this article, the efficiency of n-type silicon solar cells with a front side boron-doped emitter and a full-area tunnel oxide passivating electron contact was studied experimentally as a function of wafer thickness W and resistivity ρ b.

470 citations

Journal ArticleDOI
TL;DR: In this paper, the authors discuss the design guidelines for passivating contacts and outline their prospects, and present an overview and classification of work to date on passivating contact structures in c-Si solar cells.
Abstract: To further increase the conversion efficiency of crystalline silicon (c-Si) solar cells, it is vital to reduce the recombination losses associated with the contacts. Therefore, a contact structure that simultaneously passivates the c-Si surface while selectively extracting only one type of charge carrier (i.e., either electrons or holes) is desired. Realizing such passivating contacts in c-Si solar cells has become an important research objective, and an overview and classification of work to date on this topic is presented here. Using this overview, we discuss the design guidelines for passivating contacts and outline their prospects.

263 citations

Journal ArticleDOI
TL;DR: In this paper, the authors focus on the future developments in the field of c-Si solar cells based on carrier-selective passivation layers and compare combinations of the various options of carrierselective layers concerning their combined selectivities and efficiency potentials.

228 citations