Chien-Chih Lin

Bio: Chien-Chih Lin is an academic researcher from National Taiwan University. The author has contributed to research in topics: High-κ dielectric & Capacitor. The author has an hindex of 3, co-authored 5 publications receiving 35 citations.

Performance enhancement of metal-oxide-semiconductor tunneling temperature sensors with nanoscale oxides by employing ultrathin Al2O3 high-k dielectrics

Abstract: We demonstrated a promising route for enhancing temperature sensitivity, improving saturation voltage, and reducing power consumption of the MOS(p) tunneling temperature sensors by introducing ultrathin Al2O3 into the dielectric stacks. Detailed illustrations of the working mechanism and device concept are given in this work. Three kinds of MOS(p) tunneling temperature sensors with nanoscale SiO2, HfO2, and Al2O3 dielectrics were compared comprehensively. For Al2O3 MOS(p) devices with an equivalent oxide thickness of 2 nm, the sensing performance was effectively improved and the temperature-sensitive current–voltage characteristics are reliable and reproducible. The low-temperature processing Al2O3 MOS(p) tunneling temperature sensors are potential candidates for temperature monitoring sensors on chips or biomedical systems under low thermal budget processing consideration.

Comparison of the Reliability of Thin $\hbox{Al}_{2} \hbox{O}_{3}$ Gate Dielectrics Prepared by In Situ Oxidation of Sputtered Aluminum in Oxygen Ambient With and Without Nitric Acid Compensation

Abstract: The electrical characteristics and reliability of the aluminum oxide (Al2O3) metal-oxide-semiconductor (MOS) capacitors were investigated under low-temperature process consideration. The simple cost-effective technique in preparing the Al2O3/SiO2 bilayer structure as the high-k gate dielectrics was demonstrated in this paper. SiO2 was prepared by room-temperature anodic oxidation, and Al2O3 was fabricated by room-temperature in situ natural oxidation during the dc sputtering of aluminum in Ar/O2 ambient. Compared to the Al2O3 MOS capacitors without nitric acid (HNO3) compensation, significant improvements in electrical characteristics, reliability, and uniformity were achieved by utilizing HNO3 to moderately oxidize the existing Al2O3 layer. In addition, the charge trapping behaviors of our samples were also studied by time-dependent dielectric breakdown under the 1000-s constant voltage stress and constant current stress tests. It was found that the electron trapping is dominant under a low negative bias stress. However, under a high negative bias stress, the Al2O3 MOS capacitors show hole trapping due to the impact ionization near the SiO2/Si interface. The in situ oxidation in sputtering with HNO3 compensation is suitable for future low-temperature dielectric applications.

Nitric acid compensated aluminum oxide dielectrics with improved negative bias reliability and positive bias temperature response

Abstract: The room-temperature nitric acid (HNO3) compensation method is introduced to effectively improve the dielectric quality of ultrathin aluminum oxide (Al2O3) gate dielectrics under low thermal budget consideration. The physical properties, electrical characteristics, and temperature response of Al2O3 metal-oxide-semiconductor (MOS) devices without and with HNO3 compensation are compared. The surface roughness and interface trap density are obviously decreased by utilizing HNO3 compensation. Under negative gate bias, the leakage current, hard breakdown characteristics, and temperature-dependent reliability of the Al2O3 MOS(p) capacitors are clearly improved by HNO3 compensation. Under positive gate bias, the highly temperature-dependent current is principally dominated by generation-recombination mechanism. However, the diodes without HNO3 compensation show irregular temperature response especially at temperature above 70 °C. From Frenkel-Poole emission analysis, the oxide traps in Al2O3 without HNO3 compens...

Investigation on edge fringing effect and oxide thickness dependence of inversion current in metal-oxide-semiconductor tunneling diodes with comb-shaped electrodes

Abstract: A particular edge-dependent inversion current behavior of metal-oxide-semiconductor (MOS) tunneling diodes was investigated utilizing square and comb-shaped electrodes. The inversion tunneling current exhibits the strong dependence on the tooth size of comb-shaped electrodes and oxide thickness. Detailed illustrations of current conduction mechanism are developed by simulation and experimental measurement results. It is found that the electron diffusion current and Schottky barrier height lowering for hole tunneling current both contribute on inversion current conduction. In MOS tunneling photodiode applications, the photoresponse can be improved by decreasing SiO2 thickness and using comb-shaped electrodes with smaller tooth spacing. Meantime, the high and steady photosensitivity can also be approached by introducing HfO2 into dielectric stacks.

Investigation of nonuniformity phenomenon in nanoscale SiO2 and high-k gate dielectrics

Abstract: We proposed the concept of effective uniform area ratio (Keff) to evaluate the nonuniformity phenomena of SiO2 and HfO2 gate dielectrics below 3 nm Keff can be considered as an indication of gate oxide uniformity It is found that Keff increases with the thickness of SiO2, whereas decreases with increasing effective oxide thickness for HfO2 The reason for the observed phenomena is given in this work The electrical and reliability characteristics were examined to check the feasibility of our concept The tendency of Keff values was reconfirmed by the uniformity of leakage current and constant field stress test It is believed that this methodology is useful for the future oxide quality test

Charge trapping analysis of Al2O3 films deposited by atomic layer deposition using H2O or O3 as oxidant

Abstract: In this work, the authors focus on the charge trapping behavior of Al2O3 layers deposited by atomic layer deposition. The goal is to give an insight into the effects of the oxidant source (H2O or O3) and the postdeposition anneal on the charging phenomena and the generation of new defects during electrical stress. For this purpose, current–voltage, capacitance–voltage, and conductance–voltage characteristics of Al/Al2O3/p-Si capacitors are analyzed before and after constant voltage stress and several phenomena such as the generation of neutral traps in the bulk dielectric, slow states, interface states, and charge trapping related degradation during the electrical stress are investigated. Finally, the impact of the oxidant source on the Al2O3 layer reliability is discussed.

Light assisted irreversible resistive switching in ultra thin hafnium oxide

Abstract: An ultra thin film (∼5 nm) high-k Hafnium oxide dielectric, grown on a doped p-Si(100) substrate by the atomic layer deposition technique has been investigated for resistive and capacitive switching with and without illumination of light. As grown samples illustrate small non-switching leakage current under high applied electric fields and probe frequencies and trap charge assisted counter-clockwise capacitance–voltage behavior. A unique resistance switching was observed under illumination of 15–60 mW light. In the first cycle, the light assisted switching provide a 104 : 1 resistance ratio, which diminishes in the next cycle onward, which may be due to irreversible charge injection in the oxide layers. The band offset and band match-up energy diagram for the charge carriers responsible for resistive switching and charge trapping near the interface have been demonstrated under the application of a bias electric field and light.

Selective control of electron and hole tunneling in 2D assembly

Abstract: Recent discoveries in the field of two-dimensional (2D) materials have led to the demonstration of exotic devices. Although they have new potential applications in electronics, thermally activated transport over a metal/semiconductor barrier sets physical subthermionic limitations. The challenge of realizing an innovative transistor geometry that exploits this concern remains. A new class of 2D assembly (namely, “carristor”) with a configuration similar to the metal-insulator-semiconductor structure is introduced in this work. Superior functionalities, such as a current rectification ratio of up to 400,000 and a switching ratio of higher than 106 at room temperature, are realized by quantum-mechanical tunneling of majority and minority carriers across the barrier. These carristors have a potential application as the fundamental building block of low–power consumption electronics.

Effect of interface traps for ultra-thin high-k gate dielectric based MIS devices on the capacitance-voltage characteristics

Abstract: The impact of states at the Al 2 O 3 /Si interface on the capacitance-voltage C-V characteristics of a metal/insulator/semiconductor heterostructure (MIS) capacitor was studied by a numerical simulation, by solving Schrodinger-Poisson equations and taking the electron emission rate from the interface state into account. Efficient computation and accurate physics based capacitance model of MOS devices with advanced ultra-thin equivalent oxide thickness ( EOT ) (down to 2.5 nm clearly considered here) were introduced for the near future integrated circuit IC technology nodes. Due to the importance of the interface state density for a low dimension and very low oxide thickness, a high frequency C-V model has been developed to interpret the effect of interface state density traps which communicate with the Al 2 O 3 /Si and their influence on the C-V characteristics. We found that these states are manifested by jumping capacity in the inversion zone, for a density of interface, higher than 1 × 10 11 cm − 2 eV − 1 during a p-doping of 1 × 10 18 cm − 3 . This behavior has been investigated with various doping, temperature, frequency and energy levels on the C-V curves, and compared with the MIS structure that contains a standard SiO 2 insulator.

High temperature and voltage dependent electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure

Abstract: The electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure were studied in the temperature range of 380–450 K at 1 MHz. These properties were calculated from experimental C − V and G / ω − V measurements. Experimental results show that the forward bias C − V plots exhibit a distinct peak at high temperatures, this Kind of behavior is mostly attributed to the series resistance ( R s ) and interface states ( N s s ) between Al2O3/p-Si. The temperature and bias voltage dependence of dielectric constant ( e ′ ) , dielectric loss ( e ″ ) , dielectric loss tangent ( tan δ ) and the ac electrical conductivity ( σ a c ) are studied for TiN/Al2O3/p-Si MIS structure. Experimental results show that the values of e ′ and e ″ depend on the variation of both bias voltage and temperature. The C − V and G / ω − V characteristics prove that the R s and N s s of the diode are important parameters that strongly influence the electric parameters in MIS device. The density of N s s , depending on the temperature, was determined from the C − V and G / ω − V data using the Hill-Coleman Method. The Arrhenius plot of the ac conductivity at 1 MHz is illustrated and the activation energy is found to be E a = 0.012 e V . Moreover, the electric modulus formalisms were employed to understand the relaxation mechanism of the TiN/Al2O3/p-Si structure.