Chintha Veera Venkata Durga Prasad

Bio: Chintha Veera Venkata Durga Prasad is an academic researcher from Loyola University Chicago. The author has contributed to research in topics: Smart city & Edge computing. The author has co-authored 1 publications.

Artificial Intelligence Enabled Smart City IoT System using Edge Computing

Abstract: This research work has developed an artificial intelligence (AI) enabled smart city IoT system using Edge Computing. To take the smart decision and data processing purpose, this research work has deployed AI algorithms. The novelty in this work is, incorporation of Edge computing in IoT system, which enhances the performance of the IoT system by reducing the load on the cloud. Wi-Fi protocol is used in the network level for data transmission. Raspberry–pi is used to design edge server. The main motivation of this project is to prevent from unexcepted pollution levels in air, water, etc., that causes harmful to the health and also to the nature. So, in this smart city application includes City air management, managing the traffic and transportation, utilization of power effectively, water pollution monitoring. And this monitoring is done by different sensors like camera, gas sensor, water quality sensors, other monitoring sensors. We gather physiological data from the sensors environment and stores it in the database and analyze it to take smart decision and indicates it on the webpage and intimate that information to the through e-mail via SMTP.

Improving inference time in multi-TPU systems with profiled model segmentation

Abstract: In this paper, we systematically evaluate the inference performance of the Edge TPU by Google for neural networks with different characteristics. Specifically, we determine that, given the limited amount of on-chip memory on the Edge TPU, accesses to external (host) memory rapidly become an important performance bottleneck. We demonstrate how multiple devices can be jointly used to alleviate the bottleneck introduced by accessing the host memory. We propose a solution combining model segmentation and pipelining on up to four TPUs, with remarkable performance improvements that range from 6x for neural networks with convolutional layers to 46x for fully connected layers, compared with single-TPU setups.

Improving inference time in multi-TPU systems with profiled model segmentation

Abstract: In this paper, we systematically evaluate the inference performance of the Edge TPU by Google for neural networks with different characteristics. Specifically, we determine that, given the limited amount of on-chip memory on the Edge TPU, accesses to external (host) memory rapidly become an important performance bottleneck. We demonstrate how multiple devices can be jointly used to alleviate the bottleneck introduced by accessing the host memory. We propose a solution combining model segmentation and pipelining on up to four TPUs, with remarkable performance improvements that range from 6x for neural networks with convolutional layers to 46x for fully connected layers, compared with single-TPU setups.