Chiu-Wang Lien

Bio: Chiu-Wang Lien is an academic researcher from National Tsing Hua University. The author has contributed to research in topics: Non-volatile memory & Logic gate. The author has an hindex of 4, co-authored 8 publications receiving 223 citations.

Low-Power and Nanosecond Switching in Robust Hafnium Oxide Resistive Memory With a Thin Ti Cap

Abstract: The memory performance of hafnium oxide (HfOx)-based resistive memory containing a thin reactive Ti buffer layer can be greatly improved. Due to the excellent ability of Ti to absorb oxygen atoms from the HfOx film after post-metal annealing, a large amount of oxygen vacancies are left in the HfOx layer of the TiN/Ti/HfOx/TiN stacked layer. These oxygen vacancies are crucial to make a memory device with a stable bipolar resistive switching behavior. Aside from the benefits of low operation power and large on/off ratio (>100), this memory also exhibits reliable switching endurance (>106 cycles), robust resistance states (200°C), high device yield (~100%), and fast switching speed (<10 ns).

The highly scalable and reliable hafnium oxide ReRAM and its future challenges

Abstract: A novel resistive memory with the TiN/Ti/HfO x /TiN stack is proposed and fully integrated with 0.18 µm CMOS technology. The excellent memory performances such as low operation current (down to 25 µA), low operation voltage ( 100 M cycles), and reliable data retention (10 years extrapolation at 220°C), good read disturb performance, and excellent program (PGM)/erase(ERS) disturb immunity. A 1 Kb array with robust characteristics was also fabricated successfully. The endurance for all devices can exceed 106 cycles by a pulse width of 40 ns. New verification methods, which give tight distribution for high resistance (R HIGH ) and low resistance (R LOW ), are proposed to ensure a good operation window. The future challenges for the ReRAM, such as the issue of resistance fluctuation, the lack of a comprehensive resistance switching mechanism, and the need to develop a bi-directional diode for 3D stacked application, are discussed.

A New Differential P-Channel Logic-Compatible Multiple-Time Programmable (MTP) Memory Cell With Self-Recovery Operation

Abstract: This letter presents a novel differential p-channel logic-compatible multiple-time programmable (MTP) memory cell. This MTP cell has a pair of floating gates, and performs differential read to increase the on/off window. Additionally, a novel self-recovery operation is implemented to boost the floating gate level, thus avoiding the charge-loss problem due to the thin gate oxide requirement in advance logic nonvolatile memory applications. This differential cell with its self-recovery operation is a very promising MTP solution for gate oxide layer with a 70 A thickness, and can be implemented by 3.3 V I/O in 90 nm and the advanced CMOS logic processes such as 45 nm and beyond.

A New 2T Contact Coupling Gate MTP Memory in Fully CMOS Compatible Process

Abstract: A new fully logic process compatible 2T multitime programmable (MTP) memory cell has been introduced for embedded logic nonvolatile memory (NVM) applications. The cell adopts a novel contact coupling gate structure as an additional control gate for highly efficient operation and high-density memory applications. A new 2T n-channel MTP 2-Kb memory test chip has been also successfully demonstrated on pure 0.18- CMOS logic process without extra masking or process step. Furthermore, the embedded 2T MTP cell performs an efficiently program/erase operation by CHE injection and FN tunnel with highly reliable endurance and retention characteristics.

A High-Density MTP Cell With Contact Coupling Gates by Pure CMOS Logic Process

Abstract: In this letter, we propose a new fully logic-process-compatible multitime programmable (MTP) memory cell for high-density logic nonvolatile memory (NVM) applications. A very small logic NVM MTP cell has been demonstrated on pure 0.18-μm CMOS process and logic design rules without extra masking and process steps. The MTP cell can be efficiently programmed and erased with a novel tiny contact coupling structure. Very small cell size, fast programming speed, and superior reliability characteristic make the new contact coupling gate MTP cell be one of the most promising solutions in advanced logic NVM application.

Conduction Mechanism of Valence Change Resistive Switching Memory: A Survey

Abstract: Resistive switching effect in transition metal oxide (TMO) based material is often associated with the valence change mechanism (VCM). Typical modeling of valence change resistive switching memory consists of three closely related phenomena, i.e., conductive filament (CF) geometry evolution, conduction mechanism and temperature dynamic evolution. It is widely agreed that the electrochemical reduction-oxidation (redox) process and oxygen vacancies migration plays an essential role in the CF forming and rupture process. However, the conduction mechanism of resistive switching memory varies considerably depending on the material used in the dielectric layer and selection of electrodes. Among the popular observations are the Poole-Frenkel emission, Schottky emission, space-charge-limited conduction (SCLC), trap-assisted tunneling (TAT) and hopping conduction. In this article, we will conduct a survey on several published valence change resistive switching memories with a particular interest in the I-V characteristic and the corresponding conduction mechanism.

A comprehensive review on emerging artificial neuromorphic devices

Abstract: The rapid development of information technology has led to urgent requirements for high efficiency and ultralow power consumption. In the past few decades, neuromorphic computing has drawn extensive attention due to its promising capability in processing massive data with extremely low power consumption. Here, we offer a comprehensive review on emerging artificial neuromorphic devices and their applications. In light of the inner physical processes, we classify the devices into nine major categories and discuss their respective strengths and weaknesses. We will show that anion/cation migration-based memristive devices, phase change, and spintronic synapses have been quite mature and possess excellent stability as a memory device, yet they still suffer from challenges in weight updating linearity and symmetry. Meanwhile, the recently developed electrolyte-gated synaptic transistors have demonstrated outstanding energy efficiency, linearity, and symmetry, but their stability and scalability still need to be optimized. Other emerging synaptic structures, such as ferroelectric, metal–insulator transition based, photonic, and purely electronic devices also have limitations in some aspects, therefore leading to the need for further developing high-performance synaptic devices. Additional efforts are also demanded to enhance the functionality of artificial neurons while maintaining a relatively low cost in area and power, and it will be of significance to explore the intrinsic neuronal stochasticity in computing and optimize their driving capability, etc. Finally, by looking into the correlations between the operation mechanisms, material systems, device structures, and performance, we provide clues to future material selections, device designs, and integrations for artificial synapses and neurons.

Evidences of oxygen-mediated resistive-switching mechanism in TiN\HfO2\Pt cells

Abstract: In this letter, we study the influence of the Pt top-electrode thickness and of the chamber atmosphere during cell operation on the resistive switching of TiN\HfO2\Pt cells. The oxygen permeability of the Pt electrode directly in contact with the atmosphere significantly affects the resistive switching and the resistance states of the cell. The results provide strong experimental indications that the electroforming operation leads to oxygen-vacancy formation and that the subsequent reset operation relies on the available oxygen species in the filament neighborhood. Significant implications with respect to endurance and retention assessment of resistive-switching memory devices are discussed.

Gd-doping effect on performance of HfO2 based resistive switching memory devices using implantation approach

Abstract: An implantation doping approach is implemented to fabricate Gd-doped HfO2 resistive random access memory (RRAM) devices. The significantly enhanced performances are achieved in the Gd-doped HfO2 RRAM devices including improved uniformity of switching parameters, enlarged ON/OFF ratio, and increased switching speed without obvious reliability degradation. This performance improvement in the Gd-doped HfO2 RRAM devices is clarified to the suppressed randomicity of oxygen vacancy filaments’ formation and the reduced oxygen ion migration barrier induced by trivalent Gd-doping effect. The achieved results also demonstrate the validity of implantation doping approach for the fabrication of RRAM devices.

$\hbox{HfO}_{x}/\hbox{TiO}_{x}/\hbox{HfO}_{x}/ \hbox{TiO}_{x}$ Multilayer-Based Forming-Free RRAM Devices With Excellent Uniformity

Abstract: In this letter, a significantly improved uniformity of device parameters (for cycle-to-cycle uniformity within one device and device-to-device uniformity), such as set voltage, reset voltage, and HRS and LRS resistance distributions, is successfully demonstrated on HfOx/TiOx multilayer (ML)-based resistive switching devices, as compared with HfOx-based single-layer device. In addition, the reported ML devices are free from forming process, which is greatly beneficial from the viewpoint of RRAM circuit operation. It is believed that both the Ti doping effect and the confinement of conduction filament within different dielectrics layers contribute to the improvement.