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Christoph Wasshuber

Bio: Christoph Wasshuber is an academic researcher from Texas Instruments. The author has contributed to research in topics: Transistor & Capacitance. The author has an hindex of 14, co-authored 44 publications receiving 1439 citations.

Papers
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Journal ArticleDOI
TL;DR: This work discusses the essential problem of random background charge and present possible solutions of SIMON, a single electron tunnel device and circuit simulator that is based on a Monte Carlo method.
Abstract: SIMON is a single electron tunnel device and circuit simulator that is based on a Monte Carlo method. It allows transient and stationary simulation of arbitrary circuits consisting of tunnel junctions, capacitors, and voltage sources of three kinds: constant, piecewise linearly time dependent, and voltage controlled. Cotunneling can be simulated either with a plain Monte Carlo method or with a combination of the Monte Carlo and master equation approach. A graphic user interface allows the quick and easy design of circuits with single-electron tunnel devices. Furthermore, as an example of the usage of SIMON, we discuss the essential problem of random background charge and present possible solutions.

373 citations

Book
01 Jan 2001
TL;DR: In this paper, the authors present a history of single-electron theory and its application in circuit design, including the following: 1.1.1 Single-electronics - made easy. 2.2 Influence of the Electromagnetic Environment. 3.2.
Abstract: 1 Introduction.- 1.1 Single-Electronics - Made Easy.- 1.2 A Historical Look Back.- 2 Theory.- 2.1 Orthodox Single-Electron Theory.- 2.1.1. Thermodynamic Formulation.- 2.2 Time and Space Correlations.- 2.3 Master Equation of Electron Transport.- 2.4 Extensions to the Orthodox Theory.- 2.4.1 Cotunneling.- 2.4.2 Influence of the Electromagnetic Environment.- Quantum Langevin Theory.- Phase Correlation Theory.- 2.4.3 Different Materials - Different Density of States.- Discrete Energy Levels.- 2.4.4 Superconducting Tunnel Junctions.- Quasiparticle Tunneling.- Parity Effect.- Andreev Reflections.- Coherent Cooper Pair Tunneling.- 2.4.5 Self-Heating.- 2.4.6 Image Charge.- 3 Simulation Methods and Numerical Algorithms.- 3.1 Monte Carlo Method.- 3.1.1 Time-Dependent Tunnel Rates.- 3.1.2 Deterministic Model.- 3.1.3 Random Numbers.- Linear Congruential Generators.- Lagged Fibonacci or Shift Register Generators.- Inverse Congruential Generators.- Resolution Limit for Rare Tunnel Events.- 3.2 Solution of the Master Equation.- 3.2.1 Krylov Subspace Approximate of the Matrix Exponential Operator.- 3.2.2 Schur-Frechet Algorithm.- 3.3 Coupling with SPICE.- 3.4 Free Energy.- 3.5 Tunnel Transmission Coefficient.- 3.5.1 Analytic Solutions.- 3.5.2 Wentzel-Kramers-Brillouin Approximation.- 3.5.3 Piecewise Potential Approximation.- Three Dimensions.- Transfer Matrix versus Scattering Matrix.- Piecewise-Constant Potential Approximation.- Piecewise-Linear Potential Approximation.- 3.5.4 Finite Differences with Continued Fraction.- 3.5.5 Finite Elements.- 3.5.6 Detour via the Time-Dependent Schrodinger Equation.- Finite Differences.- Spectral Method.- 3.6 Energy Levels.- 3.6.1 Analytic Solutions.- 3.6.2 Bohr-Sommerfeld Quantization Rule.- 3.6.3 Piecewise Potential Approximation.- Transmission Line Analogy.- 3.6.4 Finite Differences with Continued Fraction.- 3.6.5 Time-Dependent Solutions.- 3.7 Evaluation Schemes for Cotunneling.- 3.8 Rate Calculation Including Electromagnetic Environment.- Network Impedance Calculation.- 3.9 Numerical Integration of Tunnel Rates.- 3.10 Time-Dependent Node Voltages and Node Charges.- 3.11 Stability Diagram and Stable States.- 3.12 Capacitance Calculations.- 3.12.1 Analytic Formulas.- 3.12.2 Capacitance of Ellipsoid, Elliptic Disc, and Circular Disc.- 3.12.3 Image Charge Method for Spheres.- Capacitance of Two Equal Spheres.- Capacitance of an Arbitrary Arrangement of Spheres 13.- Capacitance of Two Intersecting Spheres - Capacitance Inversion.- 3.12.4 Source Point Collocation Method.- 3.12.5 Stochastic Capacitance Calculation for Rectangular.- Circuits and Applications.- 4.1 Fundamental Circuits.- 4.1.1 Single-Electron Transistor.- 4.1.2 Single-Electron Turnstile.- Asymmetric Turnstile.- 4.1.3 Single-Electron Pump.- 4.1.4 Linear Array of Junctions.- 4.1.5 Two-Dimensional Array of Junctions.- 4.2 Metrology Applications.- 4.2.1 The Quantum Metrology Triangle.- 4.2.2 Electron Pump - Current Standard.- 4.2.3 Supersensitive Electrometer.- 4.2.4 Single-Electron Proximity Probe.- 4.2.5 Coulomb Blockade Thermometer.- 4.3 Memory.- 4.3.1 Single-Electron Flip-Flop.- 4.3.2 Electron Trap Memory.- 4.3.3 Ring Memory.- 4.3.4 Background-Charge-Independent Memory.- 4.3.5 Single-Island Memory.- 4.3.6 Multiple-Island Memory.- 4.3.7 T-Memory Cell.- 4.3.8 Combinatorial Access Memory.- 4.3.9 Switch-Source-Sink Memory.- 4.3.10 Negative Differential Resistance Flip-Flop.- 4.3.11 Multivalued Memory from Asymmetric Tunnel Junctions.- 4.3.12 Nanocrystal Memory.- 4.4 Logic.- 4.4.1 Transistor-like Design - Voltage State Logic.- 4.4.2 Bits by Single Electrons - Charge State Logic.- Binary-Decision Diagram.- Lattice Gas Machines.- Systolic Processors.- 4.4.3 Quantum Cellular Automata.- 4.4.4 Wireless Logic.- 4.4.5 Tunneling Phase Logic.- 4.4.6 Parametron Logic.- 4.5 Interfacing to CMOS.- 4.6 Exotic Circuits.- 4.6.1 Neuronal Networks.- 4.6.2 Boltzmann Machines.- 4.6.3 Mixed Bag.- Negative Differential Resistance.- Digital-to-Analog Converter.- Asymmetric Tunnel Barriers.- 4.7 Evolutionary Circuit Design.- 5 Random Background Charges.- 5.1 The Good Side of High Charge Sensitivity.- 5.2 Solutions on the Material Level.- 5.3 Solutions on the Device Level.- 5.3.1 Refresh for Single-Electron Logic.- 5.3.2 Coulomb Oscillations.- 5.3.3 Resistive Elements.- 5.3.4 One- and Two-Dimensional Island Structures.- 5.4 Solutions on the Circuit and System Level.- 6 Manufacturing Methods and Material Systems.- 6.1 Shadow Evaporation.- 6.2 Step-Edge Cutoff.- 6.3 Nanoimprint.- 6.4 Planar Quantum Dots.- 6.5 Scanning Probe Microscopy.- 6.6 Granular Films.- 6.7 Self-Assembled Structures.- 6.8 Outlook.- Appendixes.- A Fermi's Golden Rule.- B Capacitance and Resistance Extraction from Measured Data.- C Analytic Solutions of the Cotunneling Rate.- D Algorithms from Number Theory.- E Convex Hull of Point Set.- F Analytic Capacitance Calculation.- References.

190 citations

Patent
08 Aug 2002
TL;DR: In this article, a gate electrode is formed covering at least a portion of the gate dielectric layer, and the first and second spacers are formed at least partially in contact with the gate electrode.
Abstract: A method for manufacturing a transistor includes forming a gate dielectric layer adjacent a semiconductor substrate. A gate electrode may be formed covering at least a portion of the gate dielectric layer. First and second doped regions of the semiconductor substrate may be formed proximate the gate electrode and separated by a channel region. First and second spacers may be formed at least partially in contact with the gate electrode. The first and second spacers may each comprise a material having a dielectric coefficient value less than the dielectric coefficient value of silicon dioxide. Third and fourth doped regions of the semiconductor substrate may be formed proximate the first and second spacers, respectively.

143 citations

Journal ArticleDOI
TL;DR: In this paper, a physically based analytical single electron transistor (SET) model is proposed for hybrid CMOS-SET analog circuit simulation, and the model parameters are physical device parameters and an associated parameter extraction procedure is reported.
Abstract: A physically based compact analytical single electron transistor (SET) model is proposed for hybrid CMOS-SET analog circuit simulation. The modeling approach is based on the "orthodox theory" of single electron tunneling, and valid for single or multi gate, symmetric or asymmetric devices and can also explain the background charge effect. The model parameters are physical device parameters and an associated parameter extraction procedure is reported. The device characteristics produced by the proposed model are verified with Monte Carlo simulation for large range of drain to source voltages (|V/sub DS/|/spl les/3e/C/sub /spl Sigma//) and temperatures [T/spl les/e/sup 2//(10k/sub B/C/sub /spl Sigma//)] and good agreements are observed. The proposed model is implemented in a commercial circuit simulator in order to develop a computer-aided design framework for CMOS-SET hybrid IC designs. A series of SPICE simulations are successfully carried out for different CMOS-SET hybrid circuits in order to reproduce their experimental/Monte Carlo simulated characteristics.

139 citations

Patent
14 Dec 2001
TL;DR: In this article, a first region of a substrate is implanted so as to induce stress in a second region, where an electrical device is formed at least partially in the second region.
Abstract: Methods and apparatus are disclosed for selectively inducing stress in a semiconductor device, wherein a first region of a substrate is implanted so as to induce stress in a second region. An electrical device is formed at least partially in the second region, wherein the induced stress therein may improve one or more operational characteristics of the device, such as channel region carrier mobility.

75 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Journal ArticleDOI
01 Apr 1999
TL;DR: In this paper, the basic physics of single-electron devices, as well as their current and prospective applications are reviewed, and some byproduct ideas which may revolutionize random access memory and digital-data-storage technologies are presented.
Abstract: The goal of this paper is to review in brief the basic physics of single-election devices, as well as their-current and prospective applications. These devices based on the controllable transfer of single electrons between small conducting "islands", have already enabled several important scientific experiments. Several other applications of analog single-election devices in unique scientific instrumentation and metrology seem quite feasible. On the other hand, the prospect of silicon transistors being replaced by single-electron devices in integrated digital circuits faces tough challenges and remains uncertain. Nevertheless, even if this replacement does not happen, single electronics will continue to play an important role by shedding light on the fundamental size limitations of new electronic devices. Moreover, recent research in this field has generated some by-product ideas which may revolutionize random-access-memory and digital-data-storage technologies.

1,451 citations

01 Oct 1999
TL;DR: In this article, the authors introduce the concept of quantum confined systems and single electron phenomena in nanodevices, as well as interference in diffusive transport and temperature decay of fluctuations.
Abstract: 1. Introduction 2. Quantum confined systems 3. Transmission in nanostructures 4. Quantum dots and single electron phenomena 5. Interference in diffusive transport 6. Temperature decay of fluctuations 7. Non-equilibrium transport and nanodevices.

1,291 citations

Journal ArticleDOI
TL;DR: In this paper, a review describes recent groundbreaking results in Si, Si/SiGe, and dopant-based quantum dots, and highlights the remarkable advances in Sibased quantum physics that have occurred in the past few years.
Abstract: This review describes recent groundbreaking results in Si, Si/SiGe, and dopant-based quantum dots, and it highlights the remarkable advances in Si-based quantum physics that have occurred in the past few years. This progress has been possible thanks to materials development of Si quantum devices, and the physical understanding of quantum effects in silicon. Recent critical steps include the isolation of single electrons, the observation of spin blockade, and single-shot readout of individual electron spins in both dopants and gated quantum dots in Si. Each of these results has come with physics that was not anticipated from previous work in other material systems. These advances underline the significant progress toward the realization of spin quantum bits in a material with a long spin coherence time, crucial for quantum computation and spintronics.

998 citations

Book
01 Jan 1997
TL;DR: In this paper, the authors introduce the concept of quantum confined systems and single electron phenomena in nanodevices and introduce interference in diffusive transport and non-equilibrium transport.
Abstract: 1 Introduction 2 Quantum confined systems 3 Transmission in nanostructures 4 Quantum dots and single electron phenomena 5 Interference in diffusive transport 6 Temperature decay of fluctuations 7 Non-equilibrium transport and nanodevices

934 citations