An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Process gas discharged from a bypass pipe to a gas exhaust system can be prevented from diffusing back to the inside of a process chamber without having to install a dedicated vacuum pump at the downstream side of the bypass pipe. The substrate processing apparatus includes a process chamber accommodating a substrate, a gas supply system supplying process gas from a process gas source to the process chamber for processing the substrate, a gas exhaust system configured to exhaust the process chamber, two or more vacuum pumps installed in series at the gas exhaust system, and a bypass pipe connected between the gas supply system and the gas exhaust system. The most upstream one of the vacuum pumps is a mechanical booster pump, and the bypass pipe is connected between the mechanical booster pump and the rest vacuum pumps located at a downstream side of the mechanical booster pump.

Substrate Processing Apparatus

A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.

Plasma processes for depositing low dielectric constant films

A faceplate for a showerhead of a semiconductor wafer processing system is provided. The faceplate has a plurality of gas passageways to provide a plurality of gases to the process region without commingling those gases before they reach the processing region within a reaction chamber. The showerhead includes a faceplate and a gas distribution manifold assembly. The faceplate defines a plurality of first gas holes that carry a first gas from the manifold assembly through the faceplate to the process region, and a plurality of channels that couple a plurality of second gas holes to a radial plenum that receives the second gas from the manifold assembly. The faceplate and the manifold assembly are each fabricated from a substantially solid nickel material.

Dual gas faceplate for a showerhead in a semiconductor wafer processing system

A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.

System comprising a semiconductor device and structure

A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects

Integrated low k dielectrics and etch stops

A method for etching a dielectric in a thermally controlled plasma etch chamber with an expanded processing window The method is adapted to incorporate benefits of a the thermal control and high evacuation capability of the chamber Etchent gases include hydrocarbons, oxygen and inert gas Explanation is provided for enablling the use of hexafluoro-1,3-butadiene in a capacitively coupled etch plasma The method is very useful for creating via, self aligned contacts, dual damascene, and other dielectric etch

Etch method using a dielectric etch chamber with expanded process window

A capacitively coupled reactor for plasma etch processing of substrates at subatmospheric pressures includes a chamber body defining a processing volume, a lid provided upon the chamber body, the lid being a first electrode, a substrate support provided in the processing volume and comprising a second electrode, a radio frequency source coupled at least to one of the first and second electrodes, a process gas inlet configured to deliver process gas into the processing volume, and an evacuation pump system having pumping capacity of at least 1600 liters/minute The greater pumping capacity controls residency time of the process gases so as to regulate the degree of dissociation into more reactive species

Dielectric etch chamber with expanded process window

An apparatus and method for scavenging etchant species from a plasma formed of etchant gas prior to the etchant gas entering a primary processing chamber of a plasma reactor. There is at least one scavenging chamber, each of which is connected at an inlet thereof to an etchant gas source and at an outlet thereof to a gas distribution device of the primary processing chamber. Each scavenging chamber has a radiation applicator that irradiates the interior of the scavenging chamber and creates a plasma therein from etchant gas flowing through the chamber from the etchant gas source to the gas distribution apparatus of the primary processing chamber. The applicator uses either an inductive discharge, capacitive discharge, direct current (DC) discharge or microwave discharge to irradiate the interior of the scavenging chamber and ignite the plasma. An etchant species scavenging source is also disposed within the scavenging chamber. This source provides scavenging material that interacts with the plasma to scavenge etchant species created by the dissociation of the etchant gas in the plasma and form etch by-products comprised of substances from both the etchant species and the scavenging source. The scavenging chambers can be employed, as is or in a modified form, as excitation chambers to excite gases at optimal conditions and feed the modified gases into the primary chamber. The scavenging chamber is modified by removing its scavenging source if this source would adversely interact with the gas being excited.

High selectivity etch using an external plasma discharge

An article of manufacture comprising an optical-ready substrate made of a first semiconductor layer, an insulating layer on top of the first semiconductor layer, and a second semiconductor layer on top of the insulating layer, wherein the second semiconductor layer has a top surface and is laterally divided into two regions including a first region and a second region, the top surface of the first region being of a quality that is sufficient to permit microelectronic circuitry to be formed therein and the second region including an optical signal distribution circuit formed therein, the optical signal distribution circuit made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuit to be fabricated in the first region of the second semiconductor layer.

Claes H. Bjorkman

Papers

Integrated low k dielectrics and etch stops

Etch method using a dielectric etch chamber with expanded process window

Dielectric etch chamber with expanded process window

High selectivity etch using an external plasma discharge

Optical ready substrates