A review of recent MOSFET threshold voltage extraction methods

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

Over the past decades, the role of torsion in gravity has been extensively investigated along the main direction of bringing gravity closer to its gauge formulation and incorporating spin in a geometric description. Here we review various torsional constructions, from teleparallel, to Einstein-Cartan, and metric-affine gauge theories, resulting in extending torsional gravity in the paradigm of f(T) gravity, where f(T) is an arbitrary function of the torsion scalar. Based on this theory, we further review the corresponding cosmological and astrophysical applications. In particular, we study cosmological solutions arising from f(T) gravity, both at the background and perturbation levels, in different eras along the cosmic expansion. The f(T) gravity construction can provide a theoretical interpretation of the late-time universe acceleration, and it can easily accommodate with the regular thermal expanding history including the radiation and cold dark matter dominated phases. Furthermore, if one traces back to very early times, a sufficiently long period of inflation can be achieved and hence can be investigated by cosmic microwave background observations, or alternatively, the Big Bang singularity can be avoided due to the appearance of non-singular bounces. Various observational constraints, especially the bounds coming from the large-scale structure data in the case of f(T) cosmology, as well as the behavior of gravitational waves, are described in detail. Moreover, the spherically symmetric and black hole solutions of the theory are reviewed. Additionally, we discuss various extensions of the f(T) paradigm. Finally, we consider the relation with other modified gravitational theories, such as those based on curvature, like f(R) gravity, trying to enlighten the subject of which formulation might be more suitable for quantization ventures and cosmological applications.

f(T) teleparallel gravity and cosmology

Experimental facts about noise are presented which help us to understand the correlation between noise in a device and its reliability. The main advantages of noise measurements are that the tests are less destructive, faster and more sensitive than DC measurements after accelerated life tests. The following topics are addressed: 1) the kind of noise spectra in view of reliability diagnostics such as thermal noise, shot noise, the typical poor-device indicators like burst noise and generation-recombination noise and the 1/f/sup 2/ and 1/f noise; 2) why conduction noise is a quality indicator; 3) the quality of electrical contacts and vias; 4) electromigration damage; 5) the reliability in diode type devices like solar cells, laser diodes, and bipolar transistors; and 6) the series resistance in modern short channel MESFET, MODFET, and MOST devices. >

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Noise as a diagnostic tool for quality and reliability of electronic devices

Random device mismatch plays an important role in the design of accurate analog circuits. Models for the matching of MOS and bipolar devices from open literature show that matching improves with increasing device area. As a result, accuracy requirements impose a minimal device area and this paper explores the impact of this constraint on the performance of general analog circuits. It results in a fixed bandwidth-accuracy-power tradeoff which is set by technology constants. This tradeoff is independent of bias point for bipolar circuits whereas for MOS circuits some bias point optimizations are possible. The performance limitations imposed by matching are compared to the limits imposed by thermal noise. For MOS circuits the power constraints due to matching are several orders of magnitude higher than for thermal noise. For the bipolar case the constraints due to noise and matching are of comparable order of magnitude. The impact of technology scaling on the conclusions of this work are briefly explored.

Device mismatch and tradeoffs in the design of analog circuits

Despite the significance of matched devices in analog circuit design, mismatch modeling for design application has been lacking. This paper addresses misconceptions about MOSFET mismatch for analog design. V/sub t/ mismatch does not follow a simplistic 1/(/spl radic/area) law, especially for wide/short and narrow/long devices, which are common geometries in analog circuits. Further, V/sub t/ and gain factor are not appropriate parameters for modeling mismatch. A physically based mismatch model can be used to obtain dramatic improvements in prediction of mismatch. This model is applied to MOSFET current mirrors to show some nonobvious effects over bias, geometry, and multiple-unit devices.

Understanding MOSFET mismatch for analog design

This paper details the VBIC95 bipolar junction transistor (BJT) model. The model was developed as an industry standard replacement for the SPICE Gummel-Poon (SGP) model, to improve deficiencies of the SGP model that have become apparent over time because of the advances in BJT process technology. VBIC95 is still based on the Gummel-Poon formulation, and thus can degenerate to be similar to the familiar SGP model. However, it includes improved modeling of the Early effect, quasi-saturation, substrate and oxide parasitics, avalanche multiplication, and temperature behavior that can be invoked selectively based on model parameter values.

VBIC95, the vertical bipolar inter-company model

Problems that have continued to remain in some of the recently published MOSFET compact models are demonstrated in this paper. Of particular interest are discontinuities observed in these models at the boundary between forward and reverse mode operation. A new MOSFET model is presented that overcomes the errors present in state-of-the-art models. Comparison with measured data is also presented to validate the new model.

An improved MOSFET model for circuit simulation

This paper addresses misconceptions about MOSFET mismatch for analog design. V/sub t/ mismatch does not follow a simplistic 1/(/spl radic/area) law, especially for wide/short and narrow/long devices, which are common geometries in analog circuits. Further, Vt and gain factor are not appropriate parameters for modeling mismatch. A physically based mismatch model can be used to obtain dramatic improvements in the prediction of mismatch. This model is applied to MOSFET current mirrors to show some non-obvious effects over bias, geometry, and multiple unit devices.

This paper presents dc and ac tests that verify whether a MOSFET model is symmetric with respect to a source-drain reversal. The tests are valid in the presence of and also verify the symmetry of gate and bulk currents, and evaluate the symmetry of all components of MOSFET charge models

Colin C. McAndrew

Papers

Understanding MOSFET mismatch for analog design

VBIC95, the vertical bipolar inter-company model

An improved MOSFET model for circuit simulation

Understanding MOSFET mismatch for analog design

Validation of MOSFET model Source–Drain Symmetry

Colin C. McAndrew

Papers

Understanding MOSFET mismatch for analog design

VBIC95, the vertical bipolar inter-company model

An improved MOSFET model for circuit simulation

Understanding MOSFET mismatch for analog design

Validation of MOSFET model Source&#8211;Drain Symmetry

Validation of MOSFET model Source–Drain Symmetry