D. Baauw

Bio: D. Baauw is an academic researcher from University of Michigan. The author has contributed to research in topics: Low-power electronics & Power semiconductor device. The author has an hindex of 1, co-authored 1 publications receiving 1163 citations.

Leakage current: Moore's law meets static power

Abstract: Off-state leakage is static power, current that leaks through transistors even when they are turned off. The other source of power dissipation in today's microprocessors, dynamic power, arises from the repeated capacitance charge and discharge on the output of the hundreds of millions of gates in today's chips. Until recently, only dynamic power has been a significant source of power consumption, and Moore's law helped control it. However, power consumption has now become a primary microprocessor design constraint; one that researchers in both industry and academia will struggle to overcome in the next few years. Microprocessor design has traditionally focused on dynamic power consumption as a limiting factor in system integration. As feature sizes shrink below 0.1 micron, static power is posing new low-power design challenges.

The Quantum Anomalous Hall Effect: Theory and Experiment

Abstract: The quantum anomalous Hall effect is defined as a quantized Hall effect realized in a system without an external magnetic field. The quantum anomalous Hall effect is a novel manifestation of topological structure in many-electron systems and may have potential applications in future electronic devices. In recent years, the quantum anomalous Hall effect was proposed theoretically and realized experimentally. In this review article, we provide a systematic overview of the theoretical and experimental developments in this field.

Big Data: Survey, Technologies, Opportunities, and Challenges

Abstract: Big Data has gained much attention from the academia and the IT industry. In the digital and computing world, information is generated and collected at a rate that rapidly exceeds the boundary range. Currently, over 2 billion people worldwide are connected to the Internet, and over 5 billion individuals own mobile phones. By 2020, 50 billion devices are expected to be connected to the Internet. At this point, predicted data production will be 44 times greater than that in 2009. As information is transferred and shared at light speed on optic fiber and wireless networks, the volume of data and the speed of market growth increase. However, the fast growth rate of such large data generates numerous challenges, such as the rapid growth of data, transfer speed, diverse data, and security. Nonetheless, Big Data is still in its infancy stage, and the domain has not been reviewed in general. Hence, this study comprehensively surveys and classifies the various attributes of Big Data, including its nature, definitions, rapid growth rate, volume, management, analysis, and security. This study also proposes a data life cycle that uses the technologies and terminologies of Big Data. Future research directions in this field are determined based on opportunities and several open issues in Big Data domination. These research directions facilitate the exploration of the domain and the development of optimal techniques to address Big Data.

Finding a roadmap to achieve large neuromorphic hardware systems.

Abstract: Neuromorphic systems are gaining increasing importance in an era where CMOS digital computing techniques are meeting hard physical limits. These silicon systems mimic extremely energy efficient neural computing structures, potentially both for solving engineering applications as well as understanding neural computation. Towards this end, the authors provide a glimpse at what the technology evolution roadmap looks like for these systems so that Neuromorphic engineers may gain the same benefit of anticipation and foresight that IC designers gained from Moore's law many years ago. Scaling of energy efficiency, performance, and size will be discussed as well as how the implementation and application space of Neuromorphic systems are expected to evolve over time.

Compact Modeling of Perpendicular-Anisotropy CoFeB/MgO Magnetic Tunnel Junctions

Abstract: Magnetic tunnel junctions (MTJs) composed of ferromagnetic layers with perpendicular magnetic anisotropy (PMA) are of great interest for achieving high-density nonvolatile memory and logic chips owing to its scalability potential together with high thermal stability. Recent progress has demonstrated a capacity for high-speed performance and low power consumption through current-induced magnetization switching. In this paper, we present a compact model of the CoFeB/MgO PMA MTJ, a system exhibiting the best tunnel magnetoresistance ratio and switching performance. It integrates the physical models of static, dynamic, and stochastic behaviors; many experimental parameters are directly included to improve the agreement of simulation with experimental measurements. Mixed simulation based on the 65-nm technology node of a magnetic flip-flop validates its relevance and efficiency for MTJ/CMOS memory and logic chip design.

Spin-orbit torque magnetization switching of a three-terminal perpendicular magnetic tunnel junction

Abstract: We report on the current-induced magnetization switching of a three-terminal perpendicular magnetic tunnel junction by spin-orbit torque and its read-out using the tunnelling magnetoresistance (TMR) effect. The device is composed of a perpendicular Ta/FeCoB/MgO/FeCoB stack on top of a Ta current line. The magnetization of the bottom FeCoB layer can be switched reproducibly by the injection of current pulses with density 5 × 1011 A/m2 in the Ta layer in the presence of an in-plane bias magnetic field, leading to the full-scale change of the TMR signal. Our work demonstrates the proof of concept of a perpendicular spin-orbit torque magnetic memory cell.