We describe a distributed position-based network protocol optimized for minimum energy consumption in mobile wireless networks that support peer-to-peer communications. Given any number of randomly deployed nodes over an area, we illustrate that a simple local optimization scheme executed at each node guarantees strong connectivity of the entire network and attains the global minimum energy solution for stationary networks. Due to its localized nature, this protocol proves to be self-reconfiguring and stays close to the minimum energy solution when applied to mobile networks. Simulation results are used to verify the performance of the protocol.

Minimum energy mobile wireless networks

A 1.5-GHz low noise amplifier (LNA), intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6-/spl mu/m CMOS process. The amplifier provides a forward gain (S21) of 22 dB with a noise figure of only 3.5 dB while drawing 30 mW from a 1.5 V supply. In this paper, we present a detailed analysis of the LNA architecture, including a discussion on the effects of induced gate noise in MOS devices.

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A 1.5-V, 1.5-GHz CMOS low noise amplifier

We describe a distributed position-based network protocol optimized for minimum energy consumption in mobile wireless networks that support peer-to-peer communications. Given any number of randomly deployed nodes over an area, we show that a simple local optimization scheme executed at each node guarantees strong connectivity of the entire network and attains the global minimum energy solution for the stationary case. Due to its localized nature, this protocol proves to be self-reconfiguring and stays close to the minimum energy solution when applied to the case of mobile nodes. Our simulations verify its performance.

An overview on the vise of microelectromechanical systems (MEMS) technologies for timing and frequency control is presented. In particular, micromechanical RF filters and reference oscillators based on recently demonstrated vibrating on-chip micromechanical resonators with Q's > 10,000 at 1.5 GHz are described as an attractive solution to the increasing count of RF components (e.g., filters) expected to be needed by future multiband, multimode wireless devices. With Q's this high in on-chip abundance, such devices might also enable a paradigm shift in the design of timing and frequency control functions, where the advantages of high-Q are emphasized, rather than suppressed (e.g., due to size and cost reasons), resulting in enhanced robustness and power savings. Indeed, as vibrating RF MEMS devices are perceived more as circuit building blocks than as stand-alone devices, and as the frequency processing circuits they enable become larger and more complex, the makings of an integrated micromechanical circuit technology begin to take shape, perhaps with a functional breadth not unlike that of integrated transistor circuits. With even more aggressive three-dimensional MEMS technologies, even higher on-chip Q's are possible, such as already achieved via chip-scale atomic physics packages, which so far have achieved Q's > 107 using atomic cells measuring only 10 mm3 in volume and consuming just 5 mW of power, all while still allowing atomic clock Allan deviations down to 10-11 at one hour

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MEMS technology for timing and frequency control

An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

A 1.5 GHz low noise amplifier for a Global Positioning System (GPS) receiver has been implemented in a 0.6 /spl mu/m CMOS process. This amplifier provides a forward gain of 22 dB with a noise figure of only 3.5 dB while drawing 30 mW from a 1.5 V supply. To the authors' knowledge, this represents the lowest noise figure reported to date for a CMOS amplifier operating above 1 GHz.

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A 1.5 V, 1.5 GHz CMOS low noise amplifier

This paper describes a CMOS low-noise amplifier (LNA) and mixer intended for use in the front-end of a global positioning system (GPS) receiver. The circuits were implemented in a standard 0.35-/spl mu/m (drawn) CMOS process, with one poly and two metal layers. The LNA has a forward gain (S21) of 17 dB and a noise figure of 3.8 dB. The mixer has a voltage conversion gain of -3.6 dB and a third-order intermodulation intercept point (IP3) of 10 dBm, input referred. The combination draws 12 mW from a 1.5-V supply.

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A 12 mW wide dynamic range CMOS front end for a portable GPS receiver

This paper presents a novel RF IC varactor implemented in a standard CMOS process. This device has shown a remarkable tuning range of 150%, sensitivity of 300%/V, and quality factor of 23 at 1 GHz. A physical model of the varactor is presented and confirmed with measured data. Using the model derived, optimization has shown that a Q as high as 200 can be achieved.

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Analysis and optimization of accumulation-mode varactor for RF ICs

The influence of substrate noise coupling on the performance of a low-noise amplifier (LNA) for a CMOS GPS receiver has been investigated both analytically and experimentally. A frequency-domain approach has been used to model both noise injection into the substrate from digital circuitry integrated on the same chip and the mechanisms by which that noise can affect analog circuit behavior. The results of this study reveal that substrate noise can modulate the LNA input signal as well as couple directly to the amplifier's output.

D.K. Shaeffer

Papers

A 1.5-V, 1.5-GHz CMOS low noise amplifier

A 1.5 V, 1.5 GHz CMOS low noise amplifier

A 12 mW wide dynamic range CMOS front end for a portable GPS receiver

Analysis and optimization of accumulation-mode varactor for RF ICs

Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver