Daniel Krebs

Bio: Daniel Krebs is an academic researcher from IBM. The author has contributed to research in topics: Phase-change memory & Amorphous solid. The author has an hindex of 20, co-authored 39 publications receiving 1988 citations. Previous affiliations of Daniel Krebs include RWTH Aachen University & GlobalFoundries.

Phase-change random access memory: a scalable technology

Abstract: Nonvolatile RAM using resistance contrast in phase-change materials [or phase-change RAM (PCRAM)] is a promising technology for future storage-class memory. However, such a technology can succeed only if it can scale smaller in size, given the increasingly tiny memory cells that are projected for future technology nodes (i.e., generations). We first discuss the critical aspects that may affect the scaling of PCRAM, including materials properties, power consumption during programming and read operations, thermal cross-talk between memory cells, and failure mechanisms. We then discuss experiments that directly address the scaling properties of the phase-change materials themselves, including studies of phase transitions in both nanoparticles and ultrathin films as a function of particle size and film thickness. This work in materials directly motivated the successful creation of a series of prototype PCRAM devices, which have been fabricated and tested at phase-change material cross-sections with extremely small dimensions as low as 3 nm × 20 nm. These device measurements provide a clear demonstration of the excellent scaling potential offered by this technology, and they are also consistent with the scaling behavior predicted by extensive device simulations. Finally, we discuss issues of device integration and cell design, manufacturability, and reliability.

Crystal growth within a phase change memory cell.

Abstract: Phase change materials play a key role in information technology. Here, the authors measure the crystal growth velocity in doped Ge2Sb2Te5 up to the melting temperature, exploiting the nanoscale dimensions and the fast thermal dynamics of a phase change memory cell.

Threshold field of phase change memory materials measured using phase change bridge devices

Abstract: The threshold switching effect of phase change memory devices is typically parameterized by the threshold voltage at which this breakdown occurs. Using phase change memory bridge devices of variable length, we prove unambiguously that the important parameter for threshold switching is a critical electrical field and not a threshold voltage. By switching phase change bridge devices from the amorphous-as-deposited state, we obtain threshold fields for Ge15Sb85, Ag- and In-doped Sb2Te, Ge2Sb2Te5, and 4 nm thick Sb devices of 8.1, 19, 56, and 94 V/μm, respectively.

Projected phase-change memory devices

Abstract: Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

Evidence for thermally assisted threshold switching behavior in nanoscale phase-change memory cells

Abstract: In spite of decades of research, the details of electrical transport in phase-change materials are still debated. In particular, the so-called threshold switching phenomenon that allows the current density to increase steeply when a sufficiently high voltage is applied is still not well understood, even though there is wide consensus that threshold switching is solely of electronic origin. However, the high thermal efficiency and fast thermal dynamics associated with nanoscale phase-change memory (PCM) devices motivate us to reassess a thermally assisted threshold switching mechanism, at least in these devices. The time/temperature dependence of the threshold switching voltage and current in doped Ge2Sb2Te5 nanoscale PCM cells was measured over 6 decades in time at temperatures ranging from 40 °C to 160 °C. We observe a nearly constant threshold switching power across this wide range of operating conditions. We also measured the transient dynamics associated with threshold switching as a function of the a...

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

Architecting phase change memory as a scalable dram alternative

Abstract: Memory scaling is in jeopardy as charge storage and sensing mechanisms become less reliable for prevalent memory technologies, such as DRAM. In contrast, phase change memory (PCM) storage relies on scalable current and thermal mechanisms. To exploit PCM's scalability as a DRAM alternative, PCM must be architected to address relatively long latencies, high energy writes, and finite endurance.We propose, crafted from a fundamental understanding of PCM technology parameters, area-neutral architectural enhancements that address these limitations and make PCM competitive with DRAM. A baseline PCM system is 1.6x slower and requires 2.2x more energy than a DRAM system. Buffer reorganizations reduce this delay and energy gap to 1.2x and 1.0x, using narrow rows to mitigate write energy and multiple rows to improve locality and write coalescing. Partial writes enhance memory endurance, providing 5.6 years of lifetime. Process scaling will further reduce PCM energy costs and improve endurance.

Phase Change Memory

Abstract: In this paper, recent progress of phase change memory (PCM) is reviewed. The electrical and thermal properties of phase change materials are surveyed with a focus on the scalability of the materials and their impact on device design. Innovations in the device structure, memory cell selector, and strategies for achieving multibit operation and 3-D, multilayer high-density memory arrays are described. The scaling properties of PCM are illustrated with recent experimental results using special device test structures and novel material synthesis. Factors affecting the reliability of PCM are discussed.

Scalable high performance main memory system using phase-change memory technology

Abstract: The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. An alternative memory technology that uses resistance contrast in phase-change materials is being actively investigated in the circuits community. Phase Change Memory (PCM) devices offer more density relative to DRAM, and can help increase main memory capacity of future systems while remaining within the cost and power constraints.In this paper, we analyze a PCM-based hybrid main memory system using an architecture level model of PCM.We explore the trade-offs for a main memory system consisting of PCMstorage coupled with a small DRAM buffer. Such an architecture has the latency benefits of DRAM and the capacity benefits of PCM. Our evaluations for a baseline system of 16-cores with 8GB DRAM show that, on average, PCM can reduce page faults by 5X and provide a speedup of 3X. As PCM is projected to have limited write endurance, we also propose simple organizational and management solutions of the hybrid memory that reduces the write traffic to PCM, boosting its lifetime from 3 years to 9.7 years.