Daniele Fronte

Bio: Daniele Fronte is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Autofocus & Virtual address space. The author has an hindex of 3, co-authored 10 publications receiving 17 citations.

Procedure for processing a virtual address for programming a DMA controller and associated system on a chip

Abstract: A method is provided for processing a virtual address for a program requesting a DMA transfer. The program is designed to be run in user mode on a system on a chip that includes a central processing unit, a memory management unit, and a DMA controller. The virtual address is a source virtual address or a destination virtual address and has a size of N bits. According to the method, the virtual address is divided into at least two fields of bits. For each of the fields, there is created an N-bit address word comprising a prefix having a given value associated with the field and having more than 1 bit, and the field. The DMA controller is programmed using multiple store instructions that include one store instruction relating to each of the address words created.

On the Importance of Initial Solutions Selection in Fault Injection

Abstract: Fault injection attacks require the adversary to select suitable parameters for the attack. In this work, we consider laser fault injection and parameters like the location of the laser shot $(x,\ y)$, delay, pulse width, and intensity of the laser. The parameter selection process can be translated into an optimization problem. A very popular and successful method for various optimization problems is the genetic algorithm. To further improve the performance of a genetic algorithm, it is possible to combine it with local search to obtain a memetic algorithm. We conduct several experiments comparing the performance of the memetic algorithm and the random search algorithm for finding faults. We investigate the influence of different initialization techniques on the performance of the memetic algorithm. In our experiments, the memetic algorithm is significantly better at finding faults than the random search. While evaluating different initialization techniques, we did not observe significant differences when averaging results. However, when considering the stability of the results with a memetic algorithm based on different initialization techniques, we can distinguish preferable techniques, such as LHSMDU and the Taguchi method.

Autofocus in infrared microscopy

Abstract: Autofocus (AF) is a widely investigated subject in the fields of natural scene images, industrial assembly and biologic microscopy. This paper proposes a new effective AF method for infrared (IR) microscopy in the context of the Integrated Circuit industry (IC). The proposed method operates in the wavelet domain using a custom orthogonal wavelet for the 2D Discrete Wavelet Transform (DWT). The quality criterion of our AF algorithm relies on the standard deviance of the DWT coefficients, computed per subband and per level. Tested on several optical magnifying lenses, our method is robust time-efficient, and usable on-the-fly in the IC location system.

FMPOD: A Novel Focus Metric Based on Polynomial Decomposition for Infrared Microscopy

Abstract: This paper proposes an innovative autofocus method to ensure the image of an integrated circuit is correctly in focus under an infrared microscope. It discusses the difficulties inherent to the optical system and explores several inefficient methods used for natural scenes. It will also present a Focus Metric based on POlynomial Decomposition (FMPOD) adapted to our context. This approach relies on analyzing the projection of images on an orthonormal polynomial basis. Its robustness is tested using different magnifying lenses in addition to multiple distortions. In conclusion, we will demonstrate how this novel approach outperforms existing methods related to our work environment.

Spatial Location in Integrated Circuits through Infrared Microscopy

Abstract: In this paper, we present an infrared microscopy based approach for structures’ location in integrated circuits, to automate their secure characterization. The use of an infrared sensor is the key device for internal integrated circuit inspection. Two main issues are addressed. The first concerns the scan of integrated circuits using a motorized optical system composed of an infrared uncooled camera combined with an optical microscope. An automated system is required to focus the conductive tracks under the silicon layer. It is solved by an autofocus system analyzing the infrared images through a discrete polynomial image transform which allows an accurate features detection to build a focus metric robust against specific image degradation inherent to the acquisition context. The second issue concerns the location of structures to be characterized on the conductive tracks. Dealing with a large amount of redundancy and noise, a graph-matching method is presented—discriminating graph labels are developed to overcome the redundancy, while a flexible assignment optimizer solves the inexact matching arising from noises on graphs. The resulting automated location system brings reproducibility for secure characterization of integrated systems, besides accuracy and time speed increase.

Procedure for programming a DMA controller in a system on a chip and associated system on a chip

Abstract: A procedure is provided for programming a DMA controller of a system on a chip that includes a CPU, an MMU, a DMA controller including source, destination, and size registers, and entities that are each identified by a physical address and addressable by applying that physical address to the address bus. In response to a first dedicated instruction of a user program, the virtual address is translated into a corresponding physical address, the corresponding physical address is applied to the address bus, a signal having a first value is delivered to the DMA controller, and a signal having a second value is delivered to the entities. When the signal delivered to the DMA controller has the first value, the source register or the destination register of the DMA controller is selected and the corresponding physical address on the address bus is stored in the selected register.

System on a chip and a method for programming a DMA controller in a system on a chip

Abstract: A method is provided for programming a DMA controller in a system on a chip. According to the method, a memory management unit translates a programming virtual address into a programming physical address according to a translation table. A first sub-block without discontinuity beginning at the programming physical address and ending at an end address equal to the physical address immediately preceding a first discontinuity is formed, with the first discontinuity being determined by a discontinuity module according to information supplied by a memory management unit. Some of the programming elements intended for the DMA controller are defined according to the first identified sub-block. Also provided is a system on a chip.

Configurable device interfaces

Abstract: Coupling a device to a multicore computing system that includes multiple cores that each include a processor includes sending messages to access memory coupled to at least one of the multiple cores, the memory having an address space, and the messages including a virtual address. An interface is provided for coupling the device to the multicore computing system in a shim that: transmits or receives messages on the communication network among the processors to or from the coupled device, and translates virtual addresses to physical addresses of the address space in response to receiving the messages over the communication network that include a virtual address.

System and method for globally addressable gpu memory

Abstract: A system and method for efficient memory access. The method includes receiving a request to access a portion of memory. The request comprises a first address. The method further includes determining whether the first address corresponds to a thread local portion of memory and in response to the first address corresponding to the thread local portion of memory, translating the first address to a second address. The method further includes accessing the thread local portion of memory based on the second address. The second address corresponds to an offset in a region of memory reserved for storing thread local data and allocations into the region are contiguous for a plurality of threads at each thread local offset.

Hardware overlay assignment

Abstract: An aspect of the present invention proposes a novel approach that can reduce the total number of the overlays to be composited during the display of graphical output in a mobile computing device. As a result, the total number of memory bandwidth and the usage of a graphics processing unit by a pre-compositor can be decreased significantly. According to one embodiment, this new approach is implemented with a display panel with embedded memory which supports a partial update, or refresh feature. Which such a feature, the layer compositor (typically either the display controller or GPU) is able to keep track of actively updating regions of a display panel by checking if each layer has new content to be displayed.