D
David Nellans
Researcher at Nvidia
Publications - 69
Citations - 3589
David Nellans is an academic researcher from Nvidia. The author has contributed to research in topics: Cache & Memory management. The author has an hindex of 30, co-authored 66 publications receiving 3167 citations. Previous affiliations of David Nellans include Wilmington University & University of Utah.
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Patent
Apparatus, system, and method for managing eviction of data
TL;DR: In this paper, an apparatus, system, and method for managing eviction of data is described. But the storage operations are associated with storage operations between a host and a backing storage device.
Journal ArticleDOI
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Kshitij Sudan,Niladrish Chatterjee,David Nellans,Manu Awasthi,Rajeev Balasubramonian,Al Davis +5 more
TL;DR: The schemes presented here are motivated by the observations that a large number of accesses within heavily accessed OS pages are to small, contiguous "chunks" of cache blocks, which will improve the overall utilization of the row buffer contents, and consequently reduce memory energy consumption and access time.
Proceedings ArticleDOI
Linux block IO: introducing multi-queue SSD access on multi-core systems
TL;DR: This work describes the design of a next generation block layer that is capable of handling tens of millions of IOPS on a multi-core system equipped with a single storage device, and shows that the design scales graciously with the number of cores, even on NUMA systems with multiple sockets.
Proceedings ArticleDOI
MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability
Akhil Arunkumar,Evgeny Bolotin,Benjamin Cho,Ugljesa Milic,Eiman Ebrahimi,Oreste Villa,Aamer Jaleel,Carole-Jean Wu,David Nellans +8 more
TL;DR: It is demonstrated that package-level integration of multiple GPU modules to build larger logical GPUs can enable continuous performance scaling beyond Moore's law and solve the need for higher performing GPUs in many domains.
Patent
Object-based memory storage
TL;DR: In this paper, an object operation from an application at a hardware device manager is performed directly on a storage device using a physical address for the object corresponding to the object identifier in an index managed by the HMM.