Dennis Andrade-Miceli

Bio: Dennis Andrade-Miceli is an academic researcher from University College Dublin. The author has contributed to research in topics: CMOS & Qubit. The author has an hindex of 3, co-authored 7 publications receiving 27 citations.

A Single-Electron Injection Device for CMOS Charge Qubits Implemented in 22-nm FD-SOI

Abstract: This letter presents a single-electron injection device for position-based charge qubit structures implemented in 22-nm fully depleted silicon-on-insulator CMOS. Quantum dots are implemented in local well areas separated by tunnel barriers controlled by gate terminals overlapping with a thin 5-nm undoped silicon film. Interface of the quantum structure with classical electronic circuitry is provided with single-electron transistors that feature doped wells on the classic side. A small $0.7\times 0.4\,\,\mu \text{m}^{2}$ elementary quantum core is co-located with control circuitry inside the quantum operation cell which is operating at 3.5 K and a 2-GHz clock frequency. With this apparatus, we demonstrate a single-electron injection into a quantum dot.

Position-Based CMOS Charge Qubits for Scalable Quantum Processors at 4K

Abstract: We describe a quantum computing hardware paradigm that exploits the current scaling achievements of mainstream CMOS technology. Just like in a small IC chip, where a single nanometer-sized CMOS transistor can be reliably replicated millions of times to build a digital processor, we propose a new structure of a qubit realized as a CMOS-compatible charge-based quantum dot that can be reliably replicated thousands (or perhaps even millions) of times to construct a quantum processor. Combined with an on-chip CMOS controller, it will realize a useful quantum computer (QC) that can operate at 4 K, which is much higher than the temperature of today's QCs of 15 mK.

Cryogenic Low-Drop-Out Regulators Fully Integrated with Quantum Dot Array in 22-nm FD-SOI CMOS

Abstract: This brief presents two monolithically integrated output-capacitor-less (“caples”) low-drop-out (LDO) linear regulators implemented in 22-nm fully depleted silicon-on-insulator (FD-SOI) to support on-die scalable CMOS charge-based quantum processing unit (QPU). The proposed LDOs are used to regulate 0.8 V and 1.5 V input voltages for the programmable capacitive digital-to-analog converter (CDAC) and single-electron detector, respectively. Measured results show that both LDOs can maintain their respective output voltages with a maximum deviation <2% from ~270 K down to ~ 3.7 K.

Circuit modeling of a MEMS varactor including dielectric charging dynamics

Abstract: Electrical models for MEMS varactors including the effect of dielectric charging dynamics are not available in commercial circuit simulators. In this paper a circuit model using lumped ideal elements available in the Cadence libraries and a basic Verilog-A model, has been implemented. The model has been used to simulate the dielectric charging in function of time and its effects over the MEMS capacitance value.

Understanding complexity in multiphysics systems-on-a-chip: Modern approaches for design

Abstract: The aim of this paper is to formalise the term “complexity” in the context of modern microelectronics, propose the definitions of key terms and discuss a case study. Our aim is to show that the term “complex system” is implicitly related to the design of electronic systems.

Oscillator Flicker Phase Noise: A Tutorial

Abstract: A deep understanding of how to reduce flicker phase noise (PN) in oscillators is critical in supporting ultra-low PN frequency generation for the advanced communications and other emerging high-speed applications. Unfortunately, the current literature is either full of conflicting theories and ambiguities or too complex in mathematics, hiding the physical insights. In this brief, we comprehensively review the evolution of flicker noise upconversion theories and clarify their controversial and confusing parts. Two classes of such upconversion mechanisms in voltage-biased $LC$ -tank oscillators (nMOS-only and complementary) are specifically compared and numerically verified using a commercial simulation model of 28-nm CMOS. We identify that non-resistive terminations of both 2nd and 3rd harmonic currents contribute to oscillation waveform asymmetries that lead to the flicker noise upconversion. Further, we discuss three $1/f^{3}$ PN reduction mechanisms: waveform shaping, narrowing of conduction angle, and gate-drain phase shift.

Low-power transimpedance amplifier for cryogenic integration with quantum devices

Abstract: The development of quantum electronic devices operating below a few Kelvin degrees is raising the demand for cryogenic complementary metal-oxide-semiconductor electronics (CMOS) to be used as in situ classical control/readout circuitry. Having a minimal spatial separation between quantum and classical hardware is necessary to limit the electrical wiring to room temperature and the associated heat load and parasitic capacitances. Here, we report prototypical demonstrations of hybrid circuits combining silicon quantum dot devices and a classical transimpedance amplifier, which is characterized and then used to measure the current through the quantum dots. The two devices are positioned next to each other at 4.2 K to assess the use of the cryogenic transimpedance amplifier with respect to a room-temperature transimpedance amplifier. A quantum device built on the same substrate as the transimpedance amplifier is characterized down to 10 mK. The transimpedance amplifier is based on commercial 28 nm fully depleted Silicon-on-insulator (FDSOI) CMOS. It consists of a two-stage Miller-compensated operational amplifier with a 10 MΩ polysilicon feedback resistor, yielding a gain of 1.1 × 10 7 V/A. We show that the transimpedance amplifier operates at 10 mK with only 1 μW of power consumption, low enough to prevent heating. It exhibits linear response up to ±40 nA and a measurement bandwidth of 2.6 kHz, which could be extended to about 200 kHz by design optimization. The realization of custom-made electronics in FDSOI technology for cryogenic operation at any temperature will improve measurement speed and quality inside cryostats with higher bandwidth, lower noise, and higher signal-to-noise ratio.

A Fully Integrated Cryo-CMOS SoC for State Manipulation, Readout, and High-Speed Gate Pulsing of Spin Qubits

Abstract: This article presents a fully integrated Cryo-CMOS system on chip (SoC) for quantum computing. The proposed SoC integrates a radio frequency (RF) pulse modulator for qubit state manipulation, a multi-tone signal generator and a coherent receiver for qubit state readout, and 22 DACs for high-speed voltage pulsing of qubit gates. By adopting frequency division multiplexing and direct digital synthesis (DDS), the RF pulse modulator can control up to 16 qubits over a single RF line, and the readout receiver can detect the state of up to six qubits simultaneously. The proposed SoC also integrates a microcontroller for low latency on-chip signal processing and increased flexibility in implementing quantum instruction sets. A detailed analysis of qubit-state readout fidelity and the impact of finite DAC resolution on two-qubit gate fidelity is also included in this article, together with an electrical specification summary. The SoC is implemented in Intel’s 22 nm FFL fin field-effect transistor (FinFET) process, and it is characterized both at room and 4 K temperatures. The performance of each specific block is measured, with the readout characterized in a loop-back configuration. Generation of the control signals required for a full Rabi oscillation experiment is also demonstrated. This article also describes the cryogenic thermalization techniques used to integrate the SoC in the dilution refrigerator and shows temperature measurements during operation.

A Fully Integrated DAC for CMOS Position-Based Charge Qubits with Single-Electron Detector Loopback Testing

Abstract: This letter presents a fully integrated interface circuitry with a position-based charge qubit structure implemented in 22-nm FDSOI CMOS. The quantum structure is controlled by a tiny capacitive DAC (CDAC) that occupies $3.5\times 45\,\,\mu \text{m}^{2}$ and consumes 0.27mW running at a 2-GHz system clock. The state of the quantum structure is measured by a single-electron detector that consumes 1mW (including its output driver) with an area of $40\times 25\,\,\mu \text{m}^{2}$ . The low power and miniaturized layout of these circuits pave the way for integration in a large quantum core with thousands of qubits, which is a necessity for practical quantum computers. The CDAC output noise of 12 $\mu \text{V}$ -rms is estimated through mathematical analysis while the ≤ 0.225mV-rms input referred noise of the detector is verified by measurements at 3.4 K. The functionality of the system and performance of the CDAC are verified in a loopback mode with the detector sensing the CDAC-induced electron tunneling from the floating diffusion node into the quantum structure.

Cryo-CMOS for Quantum System On-Chip Integration: Quantum Computing as the Development Driver

Abstract: Quantum computing (QC) is a new paradigm that exploits fundamental principles of quantum mechanics, such as superposition and entanglement, to tackle problems in mathematics, chemistry, and material science that are well beyond the reach of supercomputers [1]. Its power is derived from a quantum bit (qubit) that can simultaneously exist in a superposition of both zero and one states and become entangled with other qubits. It has been shown that quantum computers can speed up algorithms and, potentially, model any physical process [2]. QC is now the main driver behind the phenomenal development of cryogenic CMOS, or cryo-CMOS [3]. The starting point was the sudden emergence of rudimentary quantum computers from obscure physics labs [4]. In the past, there was simply no sufficient motivation to go through the pain of designing IC circuits at deep cryogenic temperatures, where the silicon substrate is known to freeze out electrically and where no Spice models exist. Hence, we cannot find any remarkable literature related to cryo-CMOS from back then. Now that cryo-CMOS work has seriously begun, the designed circuits are being deployed for other applications, such as astronomy and physics experiments [5]-[12].