Dinesh K. Sharma

Bio: Dinesh K. Sharma is an academic researcher from Indian Institute of Technology Bombay. The author has contributed to research in topics: CMOS & Jitter. The author has an hindex of 22, co-authored 150 publications receiving 1611 citations. Previous affiliations of Dinesh K. Sharma include Indian Institutes of Technology & Tata Institute of Fundamental Research.

Resolution enhancement techniques for optical lithography

Abstract: Optical lithography has been the key enabling technology for scaling down dimensions of devices on VLSI chips. While electron beam and X ray lithography techniques promise higher resolution, optical lithography remains the most economical technique for defining fine patterns on a chip. The critical dimensions in current VLSIs are typically smaller than the wavelength of commonly available optical sources. Therefore, special techniques are required to achieve such high resolution. Commonly used resolution enhancement techniques are: optical proximity correction, phase shift masking and off-axis illumination. Often, a combination of these techniques can be used to good effect. In this paper, we describe the development of simulation programs which help us determine the effectiveness of these techniques in achieving a given resolution at a specified wavelength. An aerial image simulator permits us to quantify the quality of the mask image formed using resolution enhancement techniques. A resist development simulator then determines how successfully the image can be transferred to the photoresist on wafer.

Gate Fringe-Induced Barrier Lowering in Underlap FinFET Structures and Its Optimization

Abstract: The difficulty to fabricate and control precisely defined doping profiles in the source/drain underlap regions of FinFETs necessitates the use of undoped gate underlap regions as the technology scales down. We present a phenomenon called the gate fringe-induced barrier lowering (GFIBL) in FinFETs with undoped underlap regions. In these FinFETs, we show that the GFIBL can be effectively used to improve Ion. We propose the use of high-kappa spacers in such FinFETs to enhance the effect of GFIBL and thereby achieve better device and circuit performance. When compared with the underlap FinFETs with Si3N4 spacers, with kappa=20 spacers, we show that it is possible to achieve an 80% increase in Ion at iso-Ioff conditions and a 15% decrease in the inverter delay for a fan-out of four.

Physical Insight Toward Heat Transport and an Improved Electrothermal Modeling Framework for FinFET Architectures

Abstract: We report on the thermal failure of fin-shaped field-effect transistor (FinFET) devices under the normal operating condition. Pre- and post failure characteristics are investigated. A detailed physical insight on the lattice heating and heat flux in a 3-D front end of the line and complex back end of line-of a logic circuit network-is given for bulk/silicon-on-insulator (SOI) FinFET and extremely thin SOI devices using 3-D TCAD. Moreover, the self-heating behavior of both the planar and nonplanar devices is compared. Even bulk FinFET shows critical self-heating. Layout, device, and technology design guidelines (based on complex 3-D TCAD) are given for a robust on-chip thermal management. Finally, an improved framework is proposed for an accurate electrothermal modeling of various FinFET device architectures by taking into account all major heat flux paths.

Sub-20 nm gate length FinFET design: Can high-κ spacers make a difference?

Abstract: Sub-20 nm gate length FinFETs, are constrained by the very thin fin thickness (TFIN) necessary to maintain acceptable short-channel performance. For the 45 nm technology node and below, a novel device design methodology for undoped underlapped FinFETs with high-kappa spacers is presented to achieve higher circuit speed and SRAM cells with higher stability, lower leakage, faster access times and higher robustness to process variations compared to overlapped FinFETs. While comparing different FinFETs, we propose ON-current per fin as the parameter to be optimized instead of ON-current normalized to electrical width.

Macroporous silicon based capacitive affinity sensor—fabrication and electrochemical studies

Abstract: We report the fabrication and characterization of capacitive immunosensors based on electrolyte-insulator-porous silicon (EIS) structures. The sensor structure, gold∣silicon∣porous silicon∣SiO2∣aminosilane∣glutaraldehyde∣antibody∣phosphate-buffered-saline (PBS)∣platinum, is fabricated with a low thermal budget process and is found to be five times more sensitive than an immunosensor on polished silicon with identical die area. Macroporous silicon was prepared by electrochemical etching of polished 〈1 0 0〉 oriented p-type silicon wafers and characterized using SEM, optical microscopy, cyclic voltammetry and impedance spectroscopy. Columnar macroporous structures of different column densities and column sizes were used as the sensor substrates. The capacitive immunosensors were fabricated by anodic oxidation of these porous silicon substrates to form oxide followed by covalent immobilization of antibody (mouse IgG). Antibody-analyte (goat anti-mouse IgG) interactions were monitored via fluorescence microscopy and by change in the measured capacitance. Sensor response was dependent on both the porous silicon column structure and oxide quality.

Interactive home shopping: Consumer, retailer, and manufacturer incentives to participate in

Abstract: The authors examine the implications of electronic shopping for consumers, retailers, and manufacturers. They assume that near-term technological developments will offer consumers unparalleled opportunities to locate and compare product offerings. They examine these advantages as a function of typical consumer goals and the types of products and services being sought and offer conclusions regarding consumer incentives and disincentives to purchase through interactive home shopping vis-à-vis traditional retail formats. The authors discuss implications for industry structure as they pertain to competition among retailers, competition among manufacturers, and retailer-manufacturer relationships.

Pursuing prosthetic electronic skin.

Abstract: Skin plays an important role in mediating our interactions with the world. Recreating the properties of skin using electronic devices could have profound implications for prosthetics and medicine. The pursuit of artificial skin has inspired innovations in materials to imitate skin's unique characteristics, including mechanical durability and stretchability, biodegradability, and the ability to measure a diversity of complex sensations over large areas. New materials and fabrication strategies are being developed to make mechanically compliant and multifunctional skin-like electronics, and improve brain/machine interfaces that enable transmission of the skin's signals into the body. This Review will cover materials and devices designed for mimicking the skin's ability to sense and generate biomimetic signals.

Nuclear Tracks in Solids (Principles and Applications)

Abstract: (1976). Nuclear Tracks in Solids (Principles and Applications) Nuclear Technology: Vol. 30, No. 1, pp. 91-92.

The Market for Virtue: The Potential and Limits of Corporate Social Responsibility

Abstract: The Market for Virtue: The Potential and Limits of Corporate Social Responsibility. By David Vogel. Washington, DC: The Brookings Institute, 2005. 222p. $28.95.Is there a “market for virtue”? If so, what can it do, and what can it not do to improve our world? In his incisive new book, David Vogel takes aim at these questions and the now-fashionable claim that there is a business case for corporate social responsibility (CSR). He concludes that there is no business case that can be generalized to all firms per se, but there is a political case for broadening what we mean by that much-used term.