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Do Kyung Hwang

Bio: Do Kyung Hwang is an academic researcher from Korea Institute of Science and Technology. The author has contributed to research in topics: Field-effect transistor & Transistor. The author has an hindex of 34, co-authored 119 publications receiving 4310 citations. Previous affiliations of Do Kyung Hwang include Georgia Tech Research Institute & Kigali Institute of Science and Technology.


Papers
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Journal ArticleDOI
TL;DR: In this article, a gate-stable ZnO thin-film transistors (TFTs) with aluminum oxide dielectric was fabricated. But the gate-bias reliability of the TFT was not improved.
Abstract: We report on the fabrication of gate-stable ZnO thin-film transistors (TFTs) with aluminum oxide dielectric. When an off-stoichiometric AlO x was deposited at room temperature, the ZnO-TFT revealed unreliable transfer characteristics: a large drain current-gate bias (I D -V G ) hysteresis and a large amount of threshold voltage (V T ) shift under gate-bias stress. As rapid thermal annealing (RTA) in O 2 ambient was applied onto AIO X at 300°C prior to ZnO channel deposition, the gate-bias reliability of the ZnO device was improved. The RTA might cause our AlO x surface to be more stoichiometric and thus to be resistant against ZnO sputter-induced damage. When the bottom-gate ZnO-TFT was fabricated with a stoichiometric Al 2 O 3 dielectric grown by atomic layer deposition (ALD), our device showed much more stable electrical characteristics than with the sputter-deposited off-stoichiometric AlO x . Last, as an ultimate effort to improve the gate reliability, we fabricated a top-gate ZnO-TFT device adopting the same thick ALD-grown stoichiometric Al 2 O 3 as in the bottom-gate device. Our top-gate device with the Al 2 O 3 dielectric then showed no hysteresis and no V T shift after several times of gate bias sweep. We conclude that both the high quality dielectric and optimized device structure are necessary to realize electrically stable ZnO-TFTs.

996 citations

Journal ArticleDOI
04 Nov 2014-ACS Nano
TL;DR: Noise reduction due to the Al2O3 passivation was expressed in terms of the reduced interface trap density values D(it) and N(it), extracted from the subthreshold slope (SS) and the CNF model, respectively.
Abstract: We investigated the reduction of current fluctuations in few-layer black phosphorus (BP) field-effect transistors resulting from Al2O3 passivation. In order to verify the effect of Al2O3 passivation on device characteristics, measurements and analyses were conducted on thermally annealed devices before and after the passivation. More specifically, static and low-frequency noise analyses were used in monitoring the charge transport characteristics in the devices. The carrier number fluctuation (CNF) model, which is related to the charge trapping/detrapping process near the interface between the channel and gate dielectric, was employed to describe the current fluctuation phenomena. Noise reduction due to the Al2O3 passivation was expressed in terms of the reduced interface trap density values Dit and Nit, extracted from the subthreshold slope (SS) and the CNF model, respectively. The deviations between the interface trap density values extracted using the SS value and CNF model are elucidated in terms of t...

281 citations

Journal ArticleDOI
TL;DR: The stability of OFETs has been primarily evaluated in devices with a bottom-gate geometry, and the use of an amorphous fl uoropolymer, CYTOP, has caused current approaches to improve the stability to focus on mitigating individual processes.
Abstract: Over the past several years, great progress has been made in the development of organic fi eld-effect transistors (OFETs). Prototypes of electronic devices such as drivers for fl at-panel displays, [ 1 ] complementary circuits, [ 2 , 3 ] radio-frequency identifi cation tags, [ 4 ] and chemical or biological sensors [ 5 , 6 ] have already been demonstrated. While charge-carrier mobility values have improved [ 2 , 3 , 7–9 ] with comparable values for both n and p -channel transistors, long-term environmental and operational stability remain two major issues that need to be resolved before OFETs can realize their full commercial potential. Recently, much effort has been devoted to improve the stability of OFETs. [ 10–18 ] For instance, to improve the environmental stability of OFETs, air-stable organic semiconductors have been synthesized [ 10 , 11 ] or encapsulation layers have been developed. [ 12 , 13 ] On the other hand, achieving operational stability is still a major challenge faced by OFETs as well as other fi eld-effect transistor (FET) technologies, such as those based on a -Si:H, poly-Si, and metal-oxide semiconductors. The operational stability of a FET is in general related to dipolar orientation and charge trapping/de-trapping events at all its critical interfaces and in the bulk of the semiconductor and gate dielectric. [ 14–18 ] The degradation of the performance of a FET during operation is refl ected by changes of its current-voltage characteristics that result from changes of mobility ( μ ), of threshold voltage ( V th ), or variations of the capacitance density ( C in ) of the gate dielectric. The dynamics of the physical and/or chemical mechanisms producing these changes, intrinsic or extrinsic, affect the performance of a FET on different time scales. [ 14 ] The stability of a FET is determined by the total effects produced by several physical and/or chemical processes, but in general, one tends to dominate over the others. This has caused current approaches to improve the stability to focus on mitigating individual processes. [ 15–18 ] Furthermore, the stability of OFETs has been primarily evaluated in devices with a bottom-gate geometry. OFETs with a top-gate geometry are relatively rare because the choice of gate dielectric material is limited since its deposition can potentially damage the organic semiconductor layer underneath. The use of an amorphous fl uoropolymer, CYTOP,

164 citations

Journal ArticleDOI
TL;DR: This work reports for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZNO channel on glass and takes advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO.
Abstract: Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet–ZnO nanowire 2D–1D heterojunction applications for p–n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP–ZnO nanodimension p–n diode displays a high ON/OFF ratio of ∼104 in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both ...

140 citations

Journal ArticleDOI
Do Kyung Hwang1, Min Suk Oh1, Jung-Min Hwang1, Jae-Hoon Kim, Seongil Im 
TL;DR: In this article, the electrical stability of organic poly-4-vinyl phenol (PVP)/inorganic oxide bilayer gate dielectrics for lowvoltage pentacene thin-film transistors (TFTs) was studied.
Abstract: We have studied the electrical stability of organic poly-4-vinyl phenol (PVP)/inorganic oxide bilayer gate dielectrics for low-voltage pentacene thin-film transistors (TFTs). Curing conditions of spin-cast PVP influence on the drain current-gate bias hysteresis behavior; long term curing reduces the magnitude of the hysteresis, which can also be reduced by decreasing the PVP thickness. The electron charge injection from gate electrode plays as another cause of the electrical hysteresis. These instabilities are categorized into the following three: channel/dielectric interface-induced, slow polarization-induced, and gate charge injection-induced hystereses. By examining the hysteresis behavior of pentacene TFTs with five different combinations of bilayer dielectric, we clarified the instability mechanisms responsible for the electrical hysteresis.

133 citations


Cited by
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Journal ArticleDOI
TL;DR: The recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed andp-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed.
Abstract: Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper.

2,440 citations

Journal ArticleDOI
20 Apr 2012-Science
TL;DR: It is shown that surface modifiers based on polymers containing simple aliphatic amine groups substantially reduce the work function of conductors including metals, transparent conductive metal oxides, conducting polymers, and graphene.
Abstract: Organic and printed electronics technologies require conductors with a work function that is sufficiently low to facilitate the transport of electrons in and out of various optoelectronic devices. We show that surface modifiers based on polymers containing simple aliphatic amine groups substantially reduce the work function of conductors including metals, transparent conductive metal oxides, conducting polymers, and graphene. The reduction arises from physisorption of the neutral polymer, which turns the modified conductors into efficient electron-selective electrodes in organic optoelectronic devices. These polymer surface modifiers are processed in air from solution, providing an appealing alternative to chemically reactive low–work function metals. Their use can pave the way to simplified manufacturing of low-cost and large-area organic electronic technologies.

1,870 citations

Journal ArticleDOI
TL;DR: In this paper, the authors review the recent progress and challenges of 2D van der Waals interactions and offer a perspective on the exploration of 2DLM-based vdWHs for future application in electronics and optoelectronics.
Abstract: Two-dimensional layered materials (2DLMs) have been a central focus of materials research since the discovery of graphene just over a decade ago. Each layer in 2DLMs consists of a covalently bonded, dangling-bond-free lattice and is weakly bound to neighbouring layers by van der Waals interactions. This makes it feasible to isolate, mix and match highly disparate atomic layers to create a wide range of van der Waals heterostructures (vdWHs) without the constraints of lattice matching and processing compatibility. Exploiting the novel properties in these vdWHs with diverse layering of metals, semiconductors or insulators, new designs of electronic devices emerge, including tunnelling transistors, barristors and flexible electronics, as well as optoelectronic devices, including photodetectors, photovoltaics and light-emitting devices with unprecedented characteristics or unique functionalities. We review the recent progress and challenges, and offer our perspective on the exploration of 2DLM-based vdWHs for future application in electronics and optoelectronics. With a dangling-bond-free surface, two dimensional layered materials (2DLMs) can enable the creation of diverse van der Waals heterostructures (vdWHs) without the conventional constraint of lattice matching or process compatibility. This Review discusses the recent advances in exploring 2DLM vdWHs for future electronics and optoelectronics.

1,850 citations

Journal ArticleDOI
TL;DR: In this article, high performance gas sensors prepared using p-type oxide semiconductors such as NiO, CuO, Cr2O3, Co3O4, and Mn3O3 were reviewed.
Abstract: High-performance gas sensors prepared using p-type oxide semiconductors such as NiO, CuO, Cr2O3, Co3O4, and Mn3O4 were reviewed. The ionized adsorption of oxygen on p-type oxide semiconductors leads to the formation of hole-accumulation layers (HALs), and conduction occurs mainly along the near-surface HAL. Thus, the chemoresistive variations of undoped p-type oxide semiconductors are lower than those induced at the electron-depletion layers of n-type oxide semiconductors. However, highly sensitive and selective p-type oxide-semiconductor-based gas sensors can be designed either by controlling the carrier concentration through aliovalent doping or by promoting the sensing reaction of a specific gas through doping/loading the sensor material with oxide or noble metal catalysts. The junction between p- and n-type oxide semiconductors fabricated with different contact configurations can provide new strategies for designing gas sensors. p-Type oxide semiconductors with distinctive surface reactivity and oxygen adsorption are also advantageous for enhancing gas selectivity, decreasing the humidity dependence of sensor signals to negligible levels, and improving recovery speed. Accordingly, p-type oxide semiconductors are excellent materials not only for fabricating highly sensitive and selective gas sensors but also valuable additives that provide new functionality in gas sensors, which will enable the development of high-performance gas sensors.

1,642 citations

Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations