An experimental bistatic radar system is described that detects and tracks targets to ranges in excess of 150 km from the receiver, using echoes from a non-cooperative FM radio transmitter The system concept and limitations on performance are described, followed by details of the processing used to implement the system An adaptive filter algorithm is described that is used to efficiently remove interference and strong clutter signals from the receiver channels A computationally efficient algorithm for target detection using Doppler-sensitive cross-correlation techniques is described A simple constant false alarm rate algorithm for target detection is described, together with a description of a Kalman filter based target association algorithm Representative results from the system are provided and compared to truth data derived from air traffic control data

FM radio based bistatic radar

A multi-channel digital transceiver (400) receives uplink radio frequency signals and converts these signals to digital intermediate frequency signals. Digital signal processing, including a digital converter module (426), is employed to select digital intermediate frequency signals received at a plurality of antennas (412) and to convert these signals to baseband signals. The baseband signals are processed to recover a communication channel therefrom. Downlink baseband signals are also processed and digital signal processing within the digital converter module (426) up converters and modulates the downlink baseband signals to digital intermediate frequency signals. The digital intermediate frequency signals are converted to analog radio frequency signals, amplified and radiated from transmit antennas (420).

Multi-channel digital transceiver and method

A new architecture for the implementation of high-order decimation filters is described. It combines the cascaded integrator-comb (CIC) multirate filter structure with filter sharpening techniques to improve the filter's passband response. This allows the first-stage CIC decimation filter to be followed by a fixed-coefficient second-stage filter, rather than a programmable filter, thereby achieving a significant hardware reduction over existing approaches. Furthermore, the use of fixed-coefficient filters in place of programmable-coefficient filters improves the overall throughput rate. The resulting architecture is well suited for single-chip VLSI implementation with very high data-sample rates. We discuss an example with specifications suitable for use in a wideband satellite communication subband tuner system and for signal analysis.

Application of filter sharpening to cascaded integrator-comb decimation filters

Analog-Digital (A/D) converters used in instrumentation and measurements often require high absolute accuracy, including very high linearity and negligible dc offset. The realization of high-resolution Nyquist-rate converters becomes very expensive when the resolution exceeds 16 bits. The conventional delta-sigma (/spl Delta//spl Sigma/) structures used in telecommunication and audio applications usually cannot satisfy the requirements of high absolute accuracy and very small offset. The incremental (or integrating) converter provides a solution for such measurement applications, as it has most advantages of the /spl Delta//spl Sigma/ converter, yet is capable of offset-free and accurate conversion. In this paper, theoretical and practical aspects of higher order incremental converters are discussed. The operating principles, topologies, specialized digital filter design methods, and circuit level issues are all addressed. It is shown how speed, resolution, and A/D complexity can be optimized for a given design, and how with some special digital filters improved speed/resolution ratio can be achieved. The theoretical results are verified by showing design examples and simulation results.

Theory and applications of incremental /spl Delta//spl Sigma/ converters

In this paper, we argue that model-based design and platform-based design are two views of the same thing. A platform is an abstraction layer in the design flow. For example, a core-based architecture and an instruction set architecture are platforms. We focus on the set of designs induced by this abstraction layer. For example, the set of all ASICs based on a particular core-based architecture and the set of all x86 programs are induced sets. Hence, a platform is equivalently a set of designs. Model-based design is about using platforms with useful modeling properties to specify designs, and then synthesizing implementations from these specifications. Hence model-based design is the view from above (more abstract, closer to the problem domain) and platform-based design is the view from below (less abstract, closer to the implementation technology). One way to define a platform is to provide a design language. Any valid expression in the language is an element of the set. A platform provides a set of cons...

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Actor-oriented design of embedded hardware and software systems

A class of digital linear phase finite impulse response (FIR) filters for decimation (sampling rate decrease) and interpolation (sampling rate increase) are presented. They require no multipliers and use limited storage making them an economical alternative to conventional implementations for certain applications. A digital filter in this class consists of cascaded ideal integrator stages operating at a high sampling rate and an equal number of comb stages operating at a low sampling rate. Together, a single integrator-comb pair produces a uniform FIR. The number of cascaded integrator-comb pairs is chosen to meet design requirements for aliasing or imaging error. Design procedures and examples are given for both decimation and interpolation filters with the emphasis on frequency response and register width.

E. Hogenauer

Papers

An economical class of digital filters for decimation and interpolation