The integrated circuit device is modeled as a four-layer structure with multiple heat sources located on the surface of the first layer and with the fourth layer representing the device package. Each layer is assumed to have the same rectangular dimensions. Using the separation of variables, an analytical solution for the temperature at any location inside and on the boundaries of the structure is derived. Based upon the solution obtained, a computer program, Thermal, has been written in Fortran. Characteristics of the solution were studied, and several representative device structures were analyzed. The results of the simulation show how the device thermal resistance is affected by the die-bonding layer properties, the electrodes on the chip surface, and the heat spreader at the bottom surface of the chip. A FET power device was also analyzed to illustrate the very narrow hot zones produced on the chip surface, suggesting that the thermal measurement techniques must have adequate spatial resolution to measure the peak temperatures accurately. The lateral spread of heat flux into the regions of the package extending beyond the chip dimensions was studied using the boundary element method. An iteration technique based on the analytical solution has also been developed to account for the effect of this lateral heat spread. The corrected temperature using this iteration technique agrees to within 3.7% with that obtained using the boundary element method. >

Thermal analysis of integrated circuit devices and packages

The Fourier series/integral closed-form method for substrate thermal analyzers has been limited by the specification of heat sources on the substrate surface. A method of complementing the basic substrate boundary value problem with lumped thermal resistances is described. In this manner, the thermal interface resistance between a chip package and board, as well as between the same package and a local ambient can be accommodated. The technique consists of combining the methods of Fourier series solution and lumped parameter thermal resistances. The theory is verified by comparing results with both thermal network and finite element model calculations for a sample problem consisting of four active devices attached to a substrate. The ramifications of a uniform heat flux at the board surface are examined by evaluating an approximate representation of a surface mount chip package. Results are compared with experimental test data for a small printed circuit board with 56 dual in-line resistor packs. >

Extensions of the closed form method for substrate thermal analyzers to include thermal resistances from source-to-substrate and source-to-ambient

A fast, easy-to-use method is developed to predict steady state temperatures on printed circuit boards subjected to heating by a single heat source or multiple heat sources. The method includes separate analytical solutions for the circuit board and for the chips to be mounted on the board. The board solution is developed using the Green's function method for solving the heat diffusion equation in the board. For the chip, the solution of the heat diffusion equation is obtained using the method of separation of variables. The temperature solution for the package is determined using an iterative procedure between the chip model and the board model. The method is verified by comparison with detailed finite element techniques. The agreement between the temperature distributions predicted by the two methods is very good. >

A semi-analytical method to predict printed circuit board package temperatures

Thermal analysis of microelectric packages and printed circuit boards using an analytic solution to the heat conduction equation

The numerical modeling of printed circuit board (PCB) configurations is addressed. Determining an optimal PCB design typically requires modeling and testing several different chip configurations. At present, much of the time and cost spent modeling these various configuration is repetitive in nature, with the same chip or board being regenerated several times before obtaining the most efficient design. By using a decoupled, iterative, numerical technique, a more systematic and efficient method for determining PCB temperature distributions has been developed and incorporated into a controlling algorithm which utilizes any standard finite-element code. Steady-state temperature distributions are obtained for each decoupled chip/board component by iterating upon decoupled interface boundary conditions until convergence is obtained. The main advantages of this decoupling technique are the elimination of repetitive numerical-model generation and the high level of interactive design provided. >

Interactive thermal modeling of electronic circuit boards

This work deals with application of semianalytical methods for evaluation of temperature distribution on substrates and integrated circuit chips. This approach is based on a method proposed by Hein and Lenzi in 1969 which is a combination of Fourier transform. Green's function, and surface-element methods. The application of the method has evolved from a model that predicts the steady-state temperature on one-layer structures with lead connectors (modeled as lumped thermal resistances) and planar-discrete sources to a model that includes the effects of multiple layers and anisotropic thermal conductivity. Further generalization of the method to three new cases is presented. The first includes the transient thermal behavior in the one-layer structures with planar-discrete sources and anisotropic conductivity. The second deals with the steady-periodic behavior of two-layer structures with planar-discrete-periodic sources and anisotropic conductivity. The third case solves for the steady-state temperature in...

E. J. Pinto

Papers

Temperature Prediction on Substrates and integrated Circuit Chips