E. M. Lysczek

Bio: E. M. Lysczek is an academic researcher from Pennsylvania State University. The author has contributed to research in topics: Ohmic contact & Contact resistance. The author has an hindex of 4, co-authored 6 publications receiving 44 citations.

Ohmic contacts to p-type InAs

Abstract: Low-resistance ohmic contact metallizations were evaluated on p-InAs (Be doped 2 × 1019 cm−3) with the goal of achieving reaction morphologies and thermal stabilities suitable for demanding heterojunction bipolar transistor applications. Each contact consists of three or four layers. The first layer is used to lower the resistance at the metal/semiconductor interface. The middle layer (or pair of layers) acts as a diffusion barrier between the other two layers. The third layer, which is typically gold, is used to lower the metal sheet resistance. Of the first layer metals used (Ti, Pd and Co), Pd showed the lowest specific contact resistance both as-deposited (1.6 × 10−6 Ω cm2) and after aging at 250 °C for 9 h (3.4 × 10−6 Ω cm2). Aging of the Ti/Pt/Au contacts resulted in indium agglomerations or voids at the interface. The Pd/W/Au and Pd/Ti/Pt/Au contacts showed the best morphology, consuming an average of only 6-7 nm of semiconductor after aging at 250 °C for 9 h.

Selective Deposition of Ohmic Contacts to p-InGaAs by Electroless Plating

Abstract: A three-layer Pd/Ru/Au electrolessly deposited ohmic contact to p-InGaAs, suitable for use in a self-aligned process, is presented. Cross-sectional transmission electron microscopy shows that the electrolessly plated metal layers are dense with a thin uniform reaction between the Pd and InGaAs. This contact metallization remains shallow and electrically stable even after aging for 4 h at 250°C. An average specific contact resistance of (1.6 ± 0.6) × 10 -6 Ω cm 2 was obtained for as-deposited contacts with an HCl surface treatment. When a UV ozone and NH 4 OH surface treatment was used, specific contact resistances as low as (2.1 ± 0.9) X 10 -7 Ω cm 2 were obtained.

Shallow ohmic contacts to p-type InAs

Abstract: A new Pd/Pt/Au ohmic contact to p-InAs provides a lower specific contact resistance as deposited (96×10−7 Ω cm2) than Ti-based ohmic contacts prepared on the same epilayer (26×10−6 Ω cm2 or higher) The effect of the metal deposition method and annealing conditions on the resistance of the contacts is also reported

Cr∕Pt Ohmic contacts to B12As2

Abstract: Palladium, Pt, and Cr∕Pt contacts to the wide band gap icosahedral boride semiconductor B12As2 have been studied. All Pd and Pt contacts exhibited nonlinear I‐V characteristics, while Cr∕Pt contacts were Ohmic. The specific contact resistance was reduced from 6Ωcm2 as-deposited to 3×10−4Ωcm2 after the Cr∕Pt contacts were annealed at 750°C for 30s in Ar. Annealing at 600°C or higher drastically reduced the semiconductor sheet resistance, whether annealing was performed before or after metallization. This apparent activation of the semiconductor is a likely cause for the improvement in the Ohmic contacts with annealing.

Shallow and Thermally Stable Ohmic Contacts to p-InAsP

Abstract: We have investigated the electrical and metallurgical behavior of ohmic contacts to p-InAs 0.80 P 0.20 . Auger depth profiling reveals that Ru, Ti, and V have better thermal stability against reaction than Pt, Pd, and Ni on p-InAsP. However, contacts with Pd deposited as the first layer exhibit lower specific contact resistances than contacts with Ti, V, Ni, Ru, or Pt as the first layer. For this reason, multilayer contacts were studied, adding Au as the top layer to minimize the metal sheet resistance. Transmission electron microscopy indicates that Pd/Ru/Au contacts aged for 3 days exhibit a uniform and shallow reaction with p-InAsP, with the Pd consuming only 4 nm of the semiconductor and the Ru serving as an effective diffusion barrier. Specific contact resistances of 3.8 X 10 -6 Ω cm 2 as deposited and 1.7 X 10 -6 Ω cm 2 for contacts aged at 250°C for 90 days in an evacuated quartz tube were measured for the Pd/Ru/Au contacts.

Mechanisms of current flow in metal-semiconductor ohmic contacts

Abstract: Published data on the properties of metal-semiconductor ohmic contacts and mechanisms of current flow in these contacts (thermionic emission, field emission, thermal-field emission, and also current flow through metal shunts) are reviewed. Theoretical dependences of the resistance of an ohmic contact on temperature and the charge-carrier concentration in a semiconductor were compared with experimental data on ohmic contacts to II–VI semiconductors (ZnSe, ZnO), III–V semiconductors (GaN, AlN, InN, GaAs, GaP, InP), Group IV semiconductors (SiC, diamond), and alloys of these semiconductors. In ohmic contacts based on lightly doped semiconductors, the main mechanism of current flow is thermionic emission with the metal-semiconductor potential barrier height equal to 0.1–0.2 eV. In ohmic contacts based on heavily doped semiconductors, the current flow is effected owing to the field emission, while the metal-semiconductor potential barrier height is equal to 0.3–0.5 eV. In alloyed In contacts to GaP and GaN, a mechanism of current flow that is not characteristic of Schottky diodes (current flow through metal shunts formed by deposition of metal atoms onto dislocations or other imperfections in semiconductors) is observed.

The physics of solid-state neutron detector materials and geometries

Abstract: Detection of neutrons, at high total efficiency, with greater resolution in kinetic energy, time and/or real-space position, is fundamental to the advance of subfields within nuclear medicine, high-energy physics, non-proliferation of special nuclear materials, astrophysics, structural biology and chemistry, magnetism and nuclear energy. Clever indirect-conversion geometries, interaction/transport calculations and modern processing methods for silicon and gallium arsenide allow for the realization of moderate- to high-efficiency neutron detectors as a result of low defect concentrations, tuned reaction product ranges, enhanced effective omnidirectional cross sections and reduced electron–hole pair recombination from more physically abrupt and electronically engineered interfaces. Conversely, semiconductors with high neutron cross sections and unique transduction mechanisms capable of achieving very high total efficiency are gaining greater recognition despite the relative immaturity of their growth, lithographic processing and electronic structure understanding. This review focuses on advances and challenges in charged-particle-based device geometries, materials and associated mechanisms for direct and indirect transduction of thermal to fast neutrons within the context of application. Calorimetry- and radioluminescence-based intermediate processes in the solid state are not included.

Factors controlling the resistance of Ohmic contacts to n-InGaAs

Abstract: The authors report specific contact resistance (ρc) values for Mo-, Ti-, TiW-, Pd-, and Pt-based Ohmic contacts to n+-In086Ga014As that are deposited with either collimated sputter or electron-beam deposition Palladium-based contacts with 5 nm of electron-beam evaporated Pd have a specific contact resistance of 76 ± 05 × 10−9 Ω cm2, while identical collimated sputter deposited contacts have a specific contact resistance of 41 ± 04 × 10−9 Ω cm2 Contacts with a very thin evaporated Pd layer (2 nm) or a sputtered Pd/Ti 1/1 nm × 4 multilayer have stable ρc values of 54 ± 05 × 10−9 and 50 ± 05 × 10−9 Ω cm2, respectively, after 2 h at 270 °C The ρc of sputter deposited TiW-based contacts is an order of magnitude lower than for identical evaporated contacts (16 ± 03 × 10−8 vs 26 ± 03 × 10−7 Ω cm2) and is stable during annealing, while sputter deposition of Pt-based contacts yields rc values that are half an order of magnitude lower than similar evaporated contacts (45 ± 10 × 10−9 vs 17 ± 02

Source and Drain Contacts for Germanium and III–V FETs for Digital Logic

Abstract: The scaling of transistors to smaller dimensions and the exploration of devices with III–V and Ge channels for digital logic places serious demands on the ohmic contacts used in these devices. Contacts with extremely low specific contact resistances are required to take full advantage of the performance promised by alternative semiconductor materials. In addition, device processes and contact morphologies must be compatible with the geometry and feature sizes of the transistors. In this article, we begin by reviewing what is known about contacts to Ge, InGaAs, InAs, and InSb, including the role of Fermi level pinning on the Schottky barrier that is often formed at the metal/semiconductor interface and common strategies for forming ohmic contacts. Then we turn our attention to the additional challenges faced when preparing ohmic contacts for the many types of field-effect transistors now under development for Ge and III–V complementary field-effect transistor technology.

Lower limits to metal-semiconductor contact resistance: Theoretical models and experimental data

Abstract: We calculate the minimum feasible contact resistivity to n-type and p-type In0.53Ga0.47As, InAs, GaAs, GaSb, InP, and InSb. The calculations consider image force lowering and assume either parabolic or non-parabolic energy dispersion in the semiconductor; their results are compared with recent experimental data. Among significant results, the measured contact resistivity to n-In0.53Ga0.47As at a carrier concentration of 5 × 1019 cm−3 is only 2.3:1 higher than that calculated assuming a 0.2 eV barrier potential, and the measured contact resistivity is only 9.0:1 larger than the Landauer quantum conductivity limit at this carrier concentration. These results indicate that, with the surface preparation procedures presently employed, surface contamination does not markedly increase the interface resistance, and that the transmission coefficient for carriers crossing the interface exceeds 10%.