E
E. Malavasi
Researcher at Cadence Design Systems
Publications - 26
Citations - 1033
E. Malavasi is an academic researcher from Cadence Design Systems. The author has contributed to research in topics: Physical design & Integrated circuit layout. The author has an hindex of 13, co-authored 26 publications receiving 1014 citations. Previous affiliations of E. Malavasi include University of Padua & University of California, Berkeley.
Papers
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Proceedings ArticleDOI
An efficient methodology for symbolic compaction of analog IC's with multiple symmetry constraints
TL;DR: An efficient approach to the symbolic compaction of analog integrated circuits is presented, which allows the use of the compactor for very complex analog circuits with multiple symmetrics and other performance constraints.
Proceedings ArticleDOI
Performance-driven compaction for analog integrated circuits
TL;DR: A novel approach to the layout compaction of analog integrated circuits which observes all of the performance and technology constraints necessary to guarantee proper analog circuit functionality is described.
Proceedings ArticleDOI
General AC constraint transformation for analog ICs
TL;DR: This paper describes how constraint transformations can be efficiently carried out using hierarchical parameter modeling and constrained optimization techniques and demonstrates the suitability of the approach through an 4th order active filter test case.
Proceedings ArticleDOI
Simultaneous Placement and Module Optimization of Analog IC's
TL;DR: The flexibility of the annealing algorithm has been significantly improved, thus making it possible to more efficiently exploit the tradeoffs between area, parasitics and matching.
Journal ArticleDOI
Symbolic compaction with analogue constraints
TL;DR: A robust and efficient constraint graph compaction algorithm which produces a compacted layout which satisfies the high-level performance constraints and is feasible for practical use within industrial-strength analogue synthesis systems is presented.