Eric A. Vittoz

Bio: Eric A. Vittoz is an academic researcher from École Polytechnique Fédérale de Lausanne. The author has contributed to research in topics: CMOS & Transistor. The author has an hindex of 41, co-authored 129 publications receiving 8895 citations. Previous affiliations of Eric A. Vittoz include Swiss Center for Electronics and Microtechnology & École Polytechnique.

An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications

Abstract: Afully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented. All the large-and small-signal variables, namely the currents, the transconductances, the intrinsic capacitances, the non-quasi-static transadmittances and the thermal noise are continuous in all regions of operation, including weak inversion, moderate inversion, strong inversion, conduction and saturation. The same approach is used to derive all the equations of the model: the weak and strong inversion asymptotes are first derived, then the variables of interest are normalized and linked using an appropriate interpolation function. The model exploits the inherent symmetry of the device by referring all the voltages to the local substrate. It is shown that the inversion chargeQ inv is controlled by the voltage differenceV P — Vch whereV ch is the channel voltage, defined as the difference between the quasi-Fermi potentials of the carriers. The pinch-off voltageV P is defined as the particular value of Vch, such that the inversion charge is zero for a given gate voltage. It depends only on the gate voltage and can be interpreted as the equivalent effect of the gate voltage referred to the channel. The various modes of operation of the transistor are then presented in terms of voltagesV P —V S andV P —V D Using the charge sheet model with the assumption of constant doping in the channel, the drain currentIDis derived and expressed as the difference between a forward componentI F and a reverse componentI R. Each of these is proportional to a function ofV P —V S respectivelyV P —V D through a specific currentI S This function is exponential in weak inversion and quadratic in strong inversion. The current in the moderate inversion region is then modelled by using an appropriate interpolation function resulting in a continuous expression valid from weak to strong inversion. A quasi-static small-signal model including the transconductances and the intrinsic capacitances is obtained from an accurate evaluation of the total charges stored on the gate and in the channel. The transconductances and the intrinsic capacitances are modelled in moderate inversion using the same interpolation function and without any additional parameters. This small-signal model is then extended to higher frequencies by replacing the transconductances by first order transadmittances obtained from a non-quasi-static calculation. All these transadmittances have the same characteristic time constant which depends on the bias condition in a continuous manner. To complete the model, a general expression for the thermal noise valid in all regions of operation is derived. This model has been successfully implemented in several computer simulation programs and has only 9 physical parameters, 3 fine tuning fitting coefficients and 2 additional temperature parameters.

CMOS analog integrated circuits based on weak inversion operations

Abstract: A simple model describing the DC behavior of MOS transistors operating in weak inversion is derived on the basis of previous publications. This model includes only two parameters and is suitable for circuit design. It is verified experimentally for both p- and n-channel test transistors of a Si-gate low-voltage CMOS technology. Various circuit configurations taking advantage of weak inversion operation are described and analyzed: two different current references based on known bipolar circuits, an amplitude detector scheme which is then applied to a quartz oscillator with the result of a very low-power consumption (<0.1 /spl mu/W at 32 kHz), and a low-frequency bandpass amplifier. All these circuits are insensitive to threshold and mobility variations, and compatible with a CMOS technology dedicated to digital low-power circuits.

High-performance crystal oscillator circuits: theory and application

Abstract: A general theory that allows the accurate linear and nonlinear analysis of any crystal oscillator circuit is presented. It is based on the high Q of the resonator and on a very few nonlimiting assumptions. The special case of the three-point oscillator, that includes Peirce and one-pin circuits, is analyzed in more detail. A clear insight into the linear behavior, including the effect of losses, is obtained by means of the circular locus of the circuit impedance. A basic condition for oscillation and simple analytic expressions are derived in the lossless case for frequency pulling, critical transconductance, and start-up time constant. The effects of nonlinearities on amplitude and on frequency stability are analyzed. As an application, a 2-MHz CMOS oscillator which uses amplitude stabilization to minimize power consumption and to eliminate the effects of nonlinearities on frequency is described. The chip, implemented in a 3- mu m p-well low-voltage process, includes a three-stage frequency divider and consumes 0.9 mu A at 1.5 V. The measured frequency stability is 0.05 p.p.m./V in the range 1.1-5 V of supply voltage. Temperature effect on the circuit itself is less than 0.1 p.p.m. from -10 to +60 degrees C. >

IDAC: an interactive design tool for analog CMOS circuits

Abstract: A design system has been developed which is able to design transconductance amplifiers, operational amplifiers, low-noise BIMOS amplifiers, voltage and current references, quartz oscillators, comparators, and oversampled A/D converters including their digital decimation filter starting from building-block and technology specifications. This design system, called Interactive Design for Analog Circuits (IDAC), is able to size a library of analog schematics (actually more than 40) as a function of technology (p-well and n-well CMOS) and desired building-block specifications. IDAC also generates a complete data sheet, an input file for SPICE2, and an input file for the analog layout program ILAC.

Charge injection in analog MOS switches

Abstract: Charge injection in MOS analog switches, also called pass transistors or transmission gates, is approached by using the continuity equation. Experimental results show the negligible influence of substrate current which leads to a unidimensional model. An easy-to-handle simplified model is deduced and its predictions compared to the injection obtained by measurements. It is shown that this model, which can be used to implement various strategies to reduce charge injection, is valid in any realistic situation.

An information-maximization approach to blind separation and blind deconvolution

Abstract: We derive a new self-organizing learning algorithm that maximizes the information transferred in a network of nonlinear units. The algorithm does not assume any knowledge of the input distributions, and is defined here for the zero-noise limit. Under these conditions, information maximization has extra properties not found in the linear case (Linsker 1989). The nonlinearities in the transfer function are able to pick up higher-order moments of the input distributions and perform something akin to true redundancy reduction between units in the output representation. This enables the network to separate statistically independent components in the inputs: a higher-order generalization of principal components analysis. We apply the network to the source separation (or cocktail party) problem, successfully separating unknown mixtures of up to 10 speakers. We also show that a variant on the network architecture is able to perform blind deconvolution (cancellation of unknown echoes and reverberation in a speech signal). Finally, we derive dependencies of information transfer on time delays. We suggest that information maximization provides a unifying framework for problems in "blind" signal processing.

Design of Analog CMOS Integrated Circuits

Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Abstract: In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.