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Erik Bruun

Bio: Erik Bruun is an academic researcher from Technical University of Denmark. The author has contributed to research in topics: CMOS & Operational amplifier. The author has an hindex of 21, co-authored 89 publications receiving 1064 citations. Previous affiliations of Erik Bruun include Information Technology University & University of Copenhagen.


Papers
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Journal ArticleDOI
01 Jan 2000
TL;DR: In this paper, the authors describe a chip for a multichannel neural stimulator for functional electrical stimulation (FES), which is able to generate charge-balanced current pulses with a controllable length up to 256 μs and an amplitude up to 2 mA.
Abstract: This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation (FES). The purpose of FES is to restore muscular control in disabled patients. The chip performs all the signal processing required in an implanted neural stimulator. The power and digital data transmission to the stimulator passes through a 5 MHz inductive link. From the signals transmitted to the stimulator, the chip is able to generate charge-balanced current pulses with a controllable length up to 256 μs and an amplitude up to 2 mA, for stimulation of nerve fibers. The quiescent current consumption of the chip is approx. 650 μA at supply voltages of 6–12 V, and its size is 3.9×3.5 mm^2. It has 4 output channels for use in a multipolar cuff electrode.

53 citations

Journal ArticleDOI
TL;DR: In this paper, a current mode operational amplifier with a low impedance output for feedback connection is proposed and analyzed theoretically, and it is found to have a constant bandwidth independent of the gain in a closed loop configuration.
Abstract: A current mode operational amplifier with a low impedance output for feedback connection is proposed and analysed theoretically. It is found to have a constant bandwidth independent of the gain in a closed loop configuration. This property is due to the loop gain independent of the closed loop gain. The amplifier is shown to be composed of a current conveyor input stage and another current conveyor output stage. Experimental results are presented to verify the constant bandwidth performance, and it is concluded that the proposed configuration is suitable for high frequency current mode amplifiers.

51 citations

Proceedings ArticleDOI
28 Apr 1995
TL;DR: A self-biased cascode configuration is presented that has the advantage of simplicity combined with a complete elimination of the need for fixed bias voltages or bias currents in the current mirror and a disadvantage is that it requires a higher input voltage to the current Mirror.
Abstract: Low-voltage cascode current mirrors are reviewed with respect to the design limitations imposed if all transistors in the mirror are required to operate in the saturation region. It is found that both a lower limit and an upper limit exist for the cascode transistor bias voltage. Further, the use of a signal dependent cascode bias voltage is discussed and a self-biased cascode configuration is presented. This configuration makes it possible to use a higher effective gate-source voltage for the mirror transistors, hence reducing the effect of threshold voltage mismatch on the current mirror gain. The proposed configuration has the advantage of simplicity combined with a complete elimination of the need for fixed bias voltages or bias currents in the current mirror. A disadvantage is that it requires a higher input voltage to the current mirror.

51 citations

Journal ArticleDOI
TL;DR: In this paper, the authors examined CMOS versions of some fundamental current mode analogue circuit blocks (current conveyors) and showed how each of the basic blocks have significant drawbacks, especially with respect to precision, compared to their bipolar counterparts.
Abstract: Most current mode circuits presented so far have been realized in bipolar technology. The most prominent family of bipolar current mode circuits is the current feedback operational amplifier which is now available as a standard device from many of the semiconductor manufacturers specializing in analogue circuits. However, when integrating VLSI systems CMOS is normally the preferred technology and hence CMOS implementations of analogue functions, including current mode functions, is attracting widespread interest. In the present paper we examine CMOS versions of some fundamental current mode analogue circuit blocks (current conveyors) and show how each of the basic blocks have significant drawbacks, especially with respect to precision, compared to their bipolar counterparts. It is further shown how a combination of a few basic building blocks can yield current mode functions (conveyors and current feedback amplifiers) with a significantly improved performance. Experimental results from an integra...

49 citations

Journal ArticleDOI
TL;DR: In this paper, the transimpedance or current feedback operational amplifier (CFB op-amp) is reviewed and compared to a conventional voltage mode opamp using an analysis emphasizing the basic feedback characteristics of the circuit.
Abstract: The transimpedance or current feedback operational amplifier (CFB op-amp) is reviewed and compared to a conventional voltage mode op-amp using an analysis emphasizing the basic feedback characteristics of the circuit. With this approach the paradox of the constant bandwidth obtained from CFB op-amps is explained. It is demonstrated in a simple manner that the constant gain-bandwidth product of the conventional op-amp and the constant bandwidth of the CFB op-amp are both in accordance with basic feedback theory and that the differences between the traditional op-amp and the CFB op-amp are due to different ways of controlling the closed-loop gain. For the traditional op-amp the closed-loop gain is altered by altering the loop gain, whereas the closed-loop gain in a CFB op-amp configuration is altered by altering the input attenuation to the feedback loop while maintaining a constant-loop gain. >

45 citations


Cited by
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Journal Article
TL;DR: An analysis of the state-of-the-art of active elements for analog signal processing is presented which support - in contrast to the conven tional operational amplifiers - not only the voltage-mode but also the current- and mixed-mode operations.
Abstract: In the paper, an analysis of the state-of-the-art of active elements for analog signal processing is presented which support - in contrast to the conven tional operational amplifiers - not only the voltage-mode but also the current- and mixed-mode operations. Several pro blems are addressed which are associated with the utiliza tion of these elements in linear applications, particularly in frequency filters. A methodology is proposed which generates a number of fundamentally new active elem ents with their potential utilization in various areas o f signal processing.

650 citations

Journal ArticleDOI
TL;DR: This article presents a comprehensive overview of the hardware realizations of artificial neural network models, known as hardware neural networks (HNN), appearing in academic studies as prototypes as well as in commercial use.

638 citations

Posted Content
TL;DR: An exhaustive review of the research conducted in neuromorphic computing since the inception of the term is provided to motivate further work by illuminating gaps in the field where new research is needed.
Abstract: Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

570 citations

Journal ArticleDOI
TL;DR: In this paper, the design and implementation of fully integrated rectifiers in BiCMOS and standard CMOS technologies for rectifying an externally generated RF carrier signal in inductively powered wireless devices, such as biomedical implants, radio-frequency identification (RFID) tags, and smartcards to generate an on-chip dc supply.
Abstract: This paper describes the design and implementation of fully integrated rectifiers in BiCMOS and standard CMOS technologies for rectifying an externally generated RF carrier signal in inductively powered wireless devices, such as biomedical implants, radio-frequency identification (RFID) tags, and smartcards to generate an on-chip dc supply. Various full-wave rectifier topologies and low-power circuit design techniques are employed to decrease substrate leakage current and parasitic components, reduce the possibility of latch-up, and improve power transmission efficiency and high-frequency performance of the rectifier block. These circuits are used in wireless neural stimulating microsystems, fabricated in two processes: the University of Michigan's 3-/spl mu/m 1M/2P N-epi BiCMOS, and the AMI 1.5-/spl mu/m 2M/2P N-well standard CMOS. The rectifier areas are 0.12-0.48 mm/sup 2/ in the above processes and they are capable of delivering >25mW from a receiver coil to the implant circuitry. The performance of these integrated rectifiers has been tested and compared, using carrier signals in 0.1-10-MHz range.

292 citations