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Errol Antonio C. Sanchez

Bio: Errol Antonio C. Sanchez is an academic researcher from Applied Materials. The author has contributed to research in topics: Silicon & Layer (electronics). The author has an hindex of 25, co-authored 125 publications receiving 2734 citations.


Papers
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Patent
08 Nov 2007
TL;DR: In this paper, a method and apparatus for delivering precursor materials to a processing chamber is described, which includes a gas distribution assembly having multiple gas delivery zones, each zone may include a plenum having an inlet for receiving a precursor gas and at least one source of non-thermal energy, such as an infrared light source.
Abstract: A method and apparatus for delivering precursor materials to a processing chamber is described. The apparatus includes a gas distribution assembly having multiple gas delivery zones. Each zone may include a plenum having an inlet for receiving a precursor gas and at least one source of non-thermal energy, such as an infrared light source. The at least one source of non-thermal energy is may be varied to control the intensity of wavelengths from the infrared light source.

199 citations

Patent
10 May 2005
TL;DR: In this paper, a substrate is exposed to at least two different process gases to deposit one layer on top of another layer, and the next process gas contains silane and an etchant.
Abstract: Embodiments of the invention provide processes to deposit silicon-containing materials, such as selectively depositing an epitaxial silicon-germanium material containing a high dopant concentration. In one example, a substrate is exposed to at least two different process gases to deposit one layer on top of another layer. One process gas contains dichlorosilane, a germanium source and an etchant while the next process gas contains silane and an etchant. In other examples, a process gas contains dichlorosilane, methylsilane and hydrogen chloride or silane, methylsilane and hydrogen chloride. In one aspect, a deposited layer has interstitial sites within a crystalline lattice and contains about 3 at% or less of carbon within the interstitial sites and is subsequently annealed to incorporate carbon within substitutional sites of the crystalline lattice. In another aspect, a silicon-germanium stack has first, second and third layers containing germanium concentrations of about 25 at% or less, about 25 at% or more and about 5 at% or less.

181 citations

Patent
08 Aug 2006
TL;DR: In this paper, methods, systems and apparatus for adjusting the temperature of at least a portion of the surface of a reaction chamber during a film formation process to control film properties are described.
Abstract: Methods, systems and apparatus are disclosed for adjusting the temperature of at least a portion of the surface of a reaction chamber during a film formation process to control film properties. More than one portion of the chamber surface may be temperature-modulated.

171 citations

Patent
08 Jan 2013
TL;DR: In this paper, a method for depositing silicon germanium tin (SiGeSn) layer on a substrate is described. But it is not shown how to obtain the SiGeSn layer on the substrate.
Abstract: Methods of depositing silicon germanium tin (SiGeSn) layer on a substrate are disclosed herein. In some embodiments, a method may include co-flowing a silicon source, a germanium source, and a tin source comprising a tin halide to a process chamber at a temperature of about 450 degrees Celsius or below and a pressure of about 100 Torr or below to deposit the SiGeSn layer on a first surface of the substrate. In some embodiments, the tin halide comprises tin tetrachloride (SnCl4).

154 citations

Patent
04 Mar 2013
TL;DR: In this paper, a germanium precursor and a tin precursor are provided to a chamber, and an epitaxial layer is formed on the substrate by either alternating or concurrent flow of a halide gas to etch the surface of the substrate.
Abstract: A method for forming germanium tin layers and the resulting embodiments are described. A germanium precursor and a tin precursor are provided to a chamber, and an epitaxial layer of germanium tin is formed on the substrate. The germanium tin layer is selectively deposited on the semiconductor regions of the substrate and can include thickness regions of varying tin and dopant concentrations. The germanium tin layer can be selectively deposited by either alternating or concurrent flow of a halide gas to etch the surface of the substrate.

152 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Journal ArticleDOI
TL;DR: In this paper, a direct bandgap GeSn alloy, grown directly onto Si(001), was used for experimentally demonstrating lasing threshold and linewidth narrowing at low temperatures.
Abstract: Lasing is experimentally demonstrated in a direct bandgap GeSn alloy, grown directly onto Si(001). The authors observe a clear lasing threshold as well as linewidth narrowing at low temperatures.

1,027 citations

Patent
16 Feb 2005
TL;DR: In this article, a bypass pipe is connected between the mechanical booster pump and the rest vacuum pumps located at a downstream side of the booster pump to prevent the exhaust gas from diffusing back to the inside of a process chamber.
Abstract: Process gas discharged from a bypass pipe to a gas exhaust system can be prevented from diffusing back to the inside of a process chamber without having to install a dedicated vacuum pump at the downstream side of the bypass pipe. The substrate processing apparatus includes a process chamber accommodating a substrate, a gas supply system supplying process gas from a process gas source to the process chamber for processing the substrate, a gas exhaust system configured to exhaust the process chamber, two or more vacuum pumps installed in series at the gas exhaust system, and a bypass pipe connected between the gas supply system and the gas exhaust system. The most upstream one of the vacuum pumps is a mechanical booster pump, and the bypass pipe is connected between the mechanical booster pump and the rest vacuum pumps located at a downstream side of the mechanical booster pump.

644 citations

Patent
08 Mar 2012
TL;DR: In this article, a method of manufacturing a semiconductor device includes forming a channel region in a workpiece, and forming a source or drain region proximate the channel region, which includes a contact resistance-lowering material layer comprising SiP, SiAs, or a silicide.
Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a channel region in a workpiece, and forming a source or drain region proximate the channel region. The source or drain region includes a contact resistance-lowering material layer comprising SiP, SiAs, or a silicide. The source or drain region also includes a channel-stressing material layer comprising SiCP or SiCAs.

490 citations

Patent
20 Jun 2006
TL;DR: In this paper, the UV photoexcitation process is used to remove native oxides prior to deposition, removing volatiles from deposited films, increasing surface energy of the deposited films and increasing the excitation energy of precursors.
Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes. Attributes of the method that are enhanced by the UV photoexcitation process include removing native oxides prior to deposition, removing volatiles from deposited films, increasing surface energy of the deposited films, increasing the excitation energy of precursors, reducing deposition time, and reducing deposition temperature.

404 citations