scispace - formally typeset
Search or ask a question
Author

Francis Balestra

Other affiliations: École Normale Supérieure
Bio: Francis Balestra is an academic researcher from École nationale supérieure d'électronique et de radioélectricité de Grenoble. The author has contributed to research in topics: Silicon on insulator & MOSFET. The author has an hindex of 21, co-authored 109 publications receiving 2018 citations. Previous affiliations of Francis Balestra include École Normale Supérieure.


Papers
More filters
Journal ArticleDOI
TL;DR: In this article, an improved analysis of low frequency trapping noise in a MOS device is proposed, taking into account the supplementary fluctuations of the mobility induced by those of the interface charge, which enables an adequate description of the gate voltage dependence of the input equivalent gate voltage noise to be obtained in various actual situations.
Abstract: An improved analysis of low frequency trapping noise in a MOS device is proposed. This analysis takes into account the supplementary fluctuations of the mobility induced by those of the interface charge. It enables an adequate description of the gate voltage dependence of the input equivalent gate voltage noise to be obtained in various actual situations. The outputs given by the Hooge mobility fluctuation model are also presented and discussed with respect to those obtained by the carrier number fluctuation model. In particular, the impact of the channel length or channel width, and the model type on the input gate voltage and drain current noise characteristics is studied and compared to typical experimental data. Finally, a procedure for the diagnosis of the low frequency noise sources in a MOS transistor is proposed.

673 citations

Journal ArticleDOI
TL;DR: In this paper, analytical models for thin and ultra-thin film silicon-on-insulator (SOI) MOSFETs operating in weak or strong inversion are proposed.
Abstract: Analytical models are proposed for thin- and ultra-thin film silicon-on-insulator (SOI) MOSFETs operating in weak or strong inversion. The models take into account all the device parameters. The cases of two and three interfaces with a silicon substrate are considered in the modeling and compared with one another. These models give the main electrical MOSFET parameters in ohmic operation (subthreshold swing and threshold voltage) for these structures. The basic approximation is the consideration of a linearly varying potential in the Si film, which has been inferred on the basis of numerical simulations. Various behaviors depending on the Si film and the buried insulator thickness as well as the interface charges, Si film doping, or substrate regime are simulated to assess the properties and the performances of SOI MOS transistors and to validate the analytical models. >

112 citations

BookDOI
01 Jan 2011
TL;DR: New semiconductor-on-insulator materials have been proposed in this article, and the physics of modern SemOI devices have been discussed. Diagnostics of the SOI devices are discussed.
Abstract: New semiconductor-on-insulator materials.- Physics of modern SemOI devices.- Diagnostics of the SOI devices.- Sensors and MEMS on SOI.

110 citations

Journal ArticleDOI
TL;DR: In this paper, an anomalous drain current is explained in terms of substrate freeze-out, since at very low temperatures the MOS structure has a type of floating substrate potential within the depletion region.
Abstract: The low temperatures current-voltage characteristics of N-channel MOS transistors have been analysed. An excess drain current is observed for intermediate values of drain voltage. This anomalous drain current is explained in terms of substrate freeze-out, since at very low temperatures the MOS structure has a type of floating substrate potential within the depletion region. Due to the increase of the majority carrier current, flowing through the substrate to the source at increasing drain voltage, this substrate potential increases and causes a change of threshold voltage. This change is observed in the current-drain voltage characteristics of the MOSFET. Various experiments, such as measurements of substrate current, effects of temperature, gate and substrate voltages, support this interpretation. MOS transistors with various geometries and various dopings are analysed.

96 citations

Journal ArticleDOI
TL;DR: In this article, the performance and physical properties of SIMOX (separation by implantation of oxygen) MOS transistors are studied from room to liquid helium temperatures with particular emphasis on the behavior of carrier mobility, threshold voltage, subthreshold swing, leakage current, and kink effect.
Abstract: The performance and the physical properties of SIMOX (separation by implantation of oxygen) MOS transistors are studied from room to liquid helium temperatures with particular emphasis on the behavior of carrier mobility, threshold voltage, subthreshold swing, leakage current, and kink effect. Various SIMOX substrates, such as partially depleted films annealed at low or high temperature and ultrathin films (100 nm), are analyzed and compared. Enhancement- and depletion-mode devices with different doping levels, channel lengths, and geometries are considered. The front and back channels are activated independently in order to assess the electrical quality of both interfaces. Comparison with bulk Si transistors reveals a number of interesting features of SIMOX devices, which are explained using comprehensive models. The advantages of low-temperature operation of SIMOX transistors are related to the decrease in subthreshold swing and leakage, increase in mobility, and reasonable shift of the threshold voltage. The performance of ultra-thin-film devices is excellent over the whole range or temperatures, whereas partially depleted transistors exhibit optimum performance at 77 K. >

71 citations


Cited by
More filters
Journal ArticleDOI
TL;DR: In this article, an analytical model for the above-threshold characteristics of long-channel, small-grain and thin channel polysilicon thin film transistors (TFT's) is presented.
Abstract: An analytical model for the above-threshold characteristics of long-channel, small-grain and thin channel polysilicon thin film transistors (TFT's) is presented. This model is constructed by considering the barrier potential and the carrier trapping effect at grain boundaries of the channel. A band tail state located at E/sub c/-0.15 eV is taken into account to simulate the I-V characteristics. Based on the model, the theoretically simulated results show good agreement with experimental data of plasma-passivated and unpassivated TFT devices in a wide range of gate and drain biases and temperature. The correlation of transconductance to gate bias is also investigated. It is found that the decrease of grain-boundary barrier potential with gate voltage enhances the transconductance, while this enhancement effect becomes insignificant and causes a decrease of transconductance at high gate bias. >

999 citations

Journal ArticleDOI
TL;DR: In this article, the authors discuss methods of forming silicon-on-insulator (SOI) wafers, their physical properties, and the latest improvements in controlling the structure parameters.
Abstract: Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics.

772 citations

Journal ArticleDOI
TL;DR: The double-gate control of silicon-on-insulator (SOI) transistors is used to force the whole silicon film (interface layers and volume) in strong inversion as discussed by the authors.
Abstract: The double-gate control of silicon-on-insulator (SOI) transistors is used to force the whole silicon film (interface layers and volume) in strong inversion. This original method of transistor operation offers excellent device performance, in particular great increases in subthreshold slope, transconductance, and drain current. A simulation program and experiments on SIMOX structures are used to study the new device.

729 citations

Journal ArticleDOI
TL;DR: In this article, an improved analysis of low frequency trapping noise in a MOS device is proposed, taking into account the supplementary fluctuations of the mobility induced by those of the interface charge, which enables an adequate description of the gate voltage dependence of the input equivalent gate voltage noise to be obtained in various actual situations.
Abstract: An improved analysis of low frequency trapping noise in a MOS device is proposed. This analysis takes into account the supplementary fluctuations of the mobility induced by those of the interface charge. It enables an adequate description of the gate voltage dependence of the input equivalent gate voltage noise to be obtained in various actual situations. The outputs given by the Hooge mobility fluctuation model are also presented and discussed with respect to those obtained by the carrier number fluctuation model. In particular, the impact of the channel length or channel width, and the model type on the input gate voltage and drain current noise characteristics is studied and compared to typical experimental data. Finally, a procedure for the diagnosis of the low frequency noise sources in a MOS transistor is proposed.

673 citations