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Frederick B. Mancoff

Bio: Frederick B. Mancoff is an academic researcher. The author has contributed to research in topics: Magnetoresistive random-access memory & Spin-transfer torque. The author has an hindex of 5, co-authored 10 publications receiving 167 citations.

Papers
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Journal ArticleDOI
TL;DR: The technology that enabled present toggle and STT-MRAM products, future STT, and new MRAM technologies beyond STT are reviewed.
Abstract: Magnetoresistive random access memory (MRAM) is regarded as a reliable persistent memory technology because of its long data retention and robust endurance. Initial MRAM products utilized toggle mode writing of a balanced synthetic antiferromagnet (SAF) free layer to overcome problems with half-selected bits that challenged traditional Stoner–Wohlfarth switching. With the development of spin transfer torque (STT) switching in perpendicular magnetic tunnel junctions, the capability for scaling MRAM products increased markedly, enabling a 1-Gb device in 2019. Ongoing research will allow scaling to even higher capacities. Compared to traditional memories, STT-MRAM can save power, improve performance, and enhance system data integrity, which supports the growing computing demands for everything from data centers to Internet of Things (IoT) devices. This article provides a review of the technology that enabled present toggle and STT-MRAM products, future STT-MRAM products, and new MRAM technologies beyond STT.

92 citations

Proceedings ArticleDOI
01 Dec 2019
TL;DR: In this article, the authors describe a fully functional 1 Gb standalone spin-transfer torque magnetoresistive random access memory (STT-MRAM) integrated on 28 nm CMOS and based on perpendicular magnetic tunnel junctions.
Abstract: In this paper, we describe a fully-functional 1 Gb standalone spin-transfer torque magnetoresistive random access memory (STT-MRAM) integrated on 28 nm CMOS and based on perpendicular magnetic tunnel junctions (pMTJ’s). Electrical short flows were used to guide the pMTJ stack development. We demonstrate reliable operation of the 1 Gb devices, including well-behaved STT write distributions, an endurance cycling lifetime up to at least 2×1011 cycles, and data retention of 10 years at 85°C. Testing results at -35°C to 110°C for the 1 Gb devices indicate good capability for industrial temperature range applications.

55 citations

Proceedings ArticleDOI
01 Jun 2017
TL;DR: An unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS-embedded 40 Mb array with full array functionality, process uniformity and reliability, and 10 years data retention at 125C with extended endurance to ∼ 107 cycles is presented.
Abstract: Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS-embedded 40 Mb array. Key features are full array functionality with low BER (bit error rate), process uniformity and reliability, 10 years data retention at 125C with extended endurance to ∼ 107 cycles. All achieved with standard BEOL process temperatures. Data retention post 260°C solder reflow temperature cycle is demonstrated.

43 citations

Proceedings ArticleDOI
01 Dec 2012
TL;DR: Key properties for commercial ST-MRAM circuits are reviewed, the challenges to achieving the many performance and scaling goals that are being addressed in current development around the world are discussed, recent results in the field are presented, and first results from a new, fully-functional 64Mb, DDR3, ST- MRAM circuit are presented.
Abstract: We review key properties for commercial ST-MRAM circuits, discuss the challenges to achieving the many performance and scaling goals that are being addressed in current development around the world, recent results in the field, and present first results from a new, fully-functional 64Mb, DDR3, ST-MRAM circuit.

37 citations

Proceedings ArticleDOI
01 Dec 2016
TL;DR: An overview of important features for reliable and manufacturable ST-MRAM as well as new results in two areas: pMTJ arrays with data retention sufficient for programming before 260°C wave solder, and performance of a 256Mb, DDR3 ST- MRAM product chip.
Abstract: In this paper we present an overview of important features for reliable and manufacturable ST-MRAM as well as new results in two areas: pMTJ arrays with data retention sufficient for programming before 260°C wave solder, and performance of a 256Mb, DDR3 ST-MRAM product chip.

29 citations


Cited by
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Journal ArticleDOI
TL;DR: A new structure with the third geometry, that is, with the easy axis collinear with the current (along the x axis), is presented and the switching operation driven by the spin-orbit torque due to Ta with a negative spin Hall angle is demonstrated.
Abstract: Spin-orbit torque, a torque brought about by in-plane current via the spin-orbit interactions in heavy-metal/ferromagnet nanostructures, provides a new pathway to switch the magnetization direction. Although there are many recent studies, they all build on one of two structures that have the easy axis of a nanomagnet lying orthogonal to the current, that is, along the z or y axes. Here, we present a new structure with the third geometry, that is, with the easy axis collinear with the current (along the x axis). We fabricate a three-terminal device with a Ta/CoFeB/MgO-based stack and demonstrate the switching operation driven by the spin-orbit torque due to Ta with a negative spin Hall angle. Comparisons with different geometries highlight the previously unknown mechanisms of spin-orbit torque switching. Our work offers a new avenue for exploring the physics of spin-orbit torque switching and its application to spintronics devices.

509 citations

Journal ArticleDOI
29 Aug 2016
TL;DR: A review of the developments in MRAM technology over the past 20 years is presented with a particular focus on spin-transfer torque MRAM (STT-MRAM) which is currently receiving the greatest attention.
Abstract: In this paper, a review of the developments in MRAM technology over the past 20 years is presented. The various MRAM generations are described with a particular focus on spin-transfer torque MRAM (STT-MRAM) which is currently receiving the greatest attention. The working principles of these various MRAM generations, the status of their developments, and demonstrations of working circuits, including already commercialized MRAM products, are discussed.

380 citations

Journal ArticleDOI
TL;DR: In this article, the spin transfer torque switching in nano-scale perpendicular magnetic tunnel junctions with a magnetoresistance ratio up to 249% and a resistance area product as low as 7.0
Abstract: Perpendicular magnetic tunnel junctions based on MgO/CoFeB structures are of particular interest for magnetic random-access memories because of their excellent thermal stability, scaling potential, and power dissipation. However, the major challenge of current-induced switching in the nanopillars with both a large tunnel magnetoresistance ratio and a low junction resistance is still to be met. Here, we report spin transfer torque switching in nano-scale perpendicular magnetic tunnel junctions with a magnetoresistance ratio up to 249% and a resistance area product as low as 7.0 Ω µm2, which consists of atom-thick W layers and double MgO/CoFeB interfaces. The efficient resonant tunnelling transmission induced by the atom-thick W layers could contribute to the larger magnetoresistance ratio than conventional structures with Ta layers, in addition to the robustness of W layers against high-temperature diffusion during annealing. The critical switching current density could be lower than 3.0 MA cm−2 for devices with a 45-nm radius. Perpendicular magnetic tunnel junctions with large tunnel magnetoresistance and low junction resistance are promising for the magnetic random access memories. Here the authors achieve the spin-transfer-torque switching in perpendicular magnetic tunnel junctions with 249% tunnel magnetoresistance and low resistance-area product.

245 citations

Journal ArticleDOI
TL;DR: Compared to other technologies, RRAM is the most promising approach which can be applicable as high-density memory, storage class memory, neuromorphic computing, and also in hardware security.
Abstract: Emerging nonvolatile memory (eNVM) devices are pushing the limits of emerging applications beyond the scope of silicon-based complementary metal oxide semiconductors (CMOS). Among several alternatives, phase change memory, spin-transfer torque random access memory, and resistive random-access memory (RRAM) are major emerging technologies. This review explains all varieties of prototype and eNVM devices, their challenges, and their applications. A performance comparison shows that it is difficult to achieve a “universal memory” which can fulfill all requirements. Compared to other emerging alternative devices, RRAM technology is showing promise with its highly scalable, cost-effective, simple two-terminal structure, low-voltage and ultra-low-power operation capabilities, high-speed switching with high-endurance, long retention, and the possibility of three-dimensional integration for high-density applications. More precisely, this review explains the journey and device engineering of RRAM with various architectures. The challenges in different prototype and eNVM devices is disused with the conventional and novel application areas. Compare to other technologies, RRAM is the most promising approach which can be applicable as high-density memory, storage class memory, neuromorphic computing, and also in hardware security. In the post-CMOS era, a more efficient, intelligent, and secure computing system is possible to design with the help of eNVM devices.

154 citations

Journal ArticleDOI
TL;DR: The suitability of the different device concepts for beyond pure memory applications, such as brain inspired and neuromorphic computational or logic in memory applications that strive to overcome the vanNeumann bottleneck, is discussed.
Abstract: In this review the different concepts of nanoscale resistive switching memory devices are described and classified according to their I-V behaviour and the underlying physical switching mechanisms. By means of the most important representative devices, the current state of electrical performance characteristics is illuminated in-depth. Moreover, the ability of resistive switching devices to be integrated into state-of-the-art CMOS circuits under the additional consideration with a suitable selector device for memory array operation is assessed. From this analysis, and by factoring in the maturity of the different concepts, a ranking methodology for application of the nanoscale resistive switching memory devices in the memory landscape is derived. Finally, the suitability of the different device concepts for beyond pure memory applications, such as brain inspired and neuromorphic computational or logic in memory applications that strive to overcome the vanNeumann bottleneck, is discussed.

145 citations