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Fumihiko Sano

Bio: Fumihiko Sano is an academic researcher from Toshiba. The author has contributed to research in topics: Encryption & Block cipher. The author has an hindex of 9, co-authored 36 publications receiving 463 citations.

Papers
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Book ChapterDOI
14 May 2000
TL;DR: The main contribution of this paper is to provide a new RNS base extension algorithm, which can be adapted to an existing standard radix interface of RSA cryptosystem.
Abstract: This paper proposes a fast parallel Montgomery multiplication algorithm based on Residue Number Systems (RNS). It is easy to construct a fast modular exponentiation by applying the algorithm repeatedly. To realize an efficient RNS Montgomery multiplication, the main contribution of this paper is to provide a new RNS base extension algorithm. Cox-Rower Architecture described in this paper is a hardware suitable for the RNS Montgomery multiplication. In this architecture, a base extension algorithm is executed in parallel by plural Rower units controlled by a Cox unit. Each Rower unit is a single-precision modular multiplier-and-accumulator, whereas Cox unit is typically a 7 bit adder. Although the main body of the algorithm processes numbers in an RNS form, efficient procedures to transform RNS to or from a radix representation are also provided. The exponentiation algorithm can, thus, be adapted to an existing standard radix interface of RSA cryptosystem.

176 citations

Patent
29 Jun 2001
TL;DR: In this paper, an encryption scheme for block data is proposed, which consists of a first processing unit randomizing the block data in units of first portions obtained by dividing the block datasets, and a second processing unit diffusing the output from the first unit with respect to a second portion of the block dataset which is wider than the first portion.
Abstract: An encryption apparatus for block data, comprises a first processing unit randomizing the block data in units of first portions obtained by dividing the block data, and a second processing unit diffusing the block data output from the first processing unit with respect to a second portion of the block data which is wider than the first portion. The first processing unit comprises first nonlinear processing units nonlinearly transforming the block data in units of the first portions. The second processing unit comprises a first linear diffusion processing unit linearly diffusing the second portion of the block data. At least one of the first nonlinear processing units comprises second nonlinear processing units nonlinearly transforming the block data in units of the first portions, and a second linear diffusion processing unit linearly diffusing the second portion of the block data.

75 citations

Patent
02 Mar 2004
TL;DR: An encryption/decryption unit includes a first data substitution section for performing data substitution of an output from the first encryption or decryption section according to a predetermined permutation table.
Abstract: An encryption/decryption unit includes a first data encryption/decryption section for performing an encryption or decryption process, a first data substitution section for performing data substitution of an output from the first encryption/decryption section according to a predetermined permutation table, a second data encryption/decryption section for performing an encryption or decryption process for an output from the first data substitution section, a second data substitution section for performing data substitution of an output from the second data encryption/decryption section according to a predetermined permutation table, and a third data encryption/decryption section for performing an encryption or decryption process for an output from the second data substitution section.

42 citations

Book ChapterDOI
14 Aug 2000
TL;DR: A nested (hierarchical) SPN structure and the symmetric block cipher "Hierocrypt", implemented in C language on Pentium III, and shows the middle-class performance of final AES candidates.
Abstract: This paper proposes a nested (hierarchical) SPN structure and the symmetric block cipher "Hierocrypt". In the nested SPN structure, lower-level SPN structures are recursively embedded into S-box positions in SPN of the higher level. This structure recursively assures the lower bound of active S-box number, and high security level is efficiently realized. The 8-round Hierocrypt is implemented in C language on Pentium III, and shows the middle-class performance of final AES candidates.

36 citations

01 Jan 2000
TL;DR: The performance of the AES finalists, MARS, RC6, Rijndael, Serpent, and Twofish, on the high-end smart card that has a Z80 core with Toshiba’s arithmetic coprocessor is reported.
Abstract: This paper reports the performance of the AES finalists, MARS, RC6, Rijndael, Serpent, and Twofish, on the high-end smart card that has a Z80 core with Toshiba’s arithmetic coprocessor.

17 citations


Cited by
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Patent
10 May 2012
TL;DR: A secure data parser as discussed by the authors parses data and then splits the data into multiple portions that are stored or communicated distinctly, which can be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths.
Abstract: A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or both may be employed for additional security. The secure data parser may be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths.

680 citations

Journal ArticleDOI
TL;DR: Having reviewed further public analysis of the finalists, NIST has decided to propose Rijndael as the Advanced Encryption Standard (AES).
Abstract: In 1997, the National Institute of Standards and Technology (NIST) initiated a process to select a symmetric-key encryption algorithm to be used to protect sensitive (unclassified) Federal information in furtherance of NIST’s statutory responsibilities. In 1998, NIST announced the acceptance of fifteen candidate algorithms and requested the assistance of the cryptographic research community in analyzing the candidates. This analysis included an initial examination of the security and efficiency characteristics for each algorithm. NIST reviewed the results of this preliminary research and selected MARS, RC6™, Rijndael, Serpent and Twofish as finalists. Having reviewed further public analysis of the finalists, NIST has decided to propose Rijndael as the Advanced Encryption Standard (AES). The research results and rationale for this selection are documented in this report.

388 citations

Journal ArticleDOI
TL;DR: This work constructs an evaluation framework, and selects the most suitable ciphers for WSNs, namely Skipjack, MISTY1, and Rijndael, depending on the combination of available memory and required security (energy efficiency being implicit).
Abstract: Cryptographic algorithms play an important role in the security architecture of wireless sensor networks (WSNs). Choosing the most storage- and energy-efficient block cipher is essential, due to the facts that these networks are meant to operate without human intervention for a long period of time with little energy supply, and that available storage is scarce on these sensor nodes. However, to our knowledge, no systematic work has been done in this area so far. We construct an evaluation framework in which we first identify the candidates of block ciphers suitable for WSNs, based on existing literature and authoritative recommendations. For evaluating and assessing these candidates, we not only consider the security properties but also the storage- and energy-efficiency of the candidates. Finally, based on the evaluation results, we select the most suitable ciphers for WSNs, namely Skipjack, MISTY1, and Rijndael, depending on the combination of available memory and required security (energy efficiency being implicit). In terms of operation mode, we recommend Output Feedback Mode for pairwise links but Cipher Block Chaining for group communications.

286 citations

01 Jan 2003
TL;DR: An automated system to generate highly efficient, platform-adapted implementations of sparse matrix kernels, and extends SPARSITY to support tuning for a variety of common non-zero patterns arising in practice, and for additional kernels like sparse triangular solve (SpTS) and computation of ATA·x and A ρ·x.
Abstract: This dissertation presents an automated system to generate highly efficient, platform-adapted implementations of sparse matrix kernels. We show that conventional implementations of important sparse kernels like sparse matrix-vector multiply (SpMV) have historically run at 10% or less of peak machine speed on cache-based superscalar architectures. Our implementations of SpMV, automatically tuned using a methodology based on empirical-search, can by contrast achieve up to 31% of peak machine speed, and can be up to 4× faster. Given a matrix, kernel, and machine; our approach to selecting a fast implementation consists of two steps: (1) we identify and generate a space of reasonable implementations, and then (2) search this space for the fastest one using a combination of heuristic models and actual experiments (i.e., running and timing the code). We build on the SPARSITY system for generating highly-tuned implementations of the SpMV kernel y ← y + Ax, where A is a sparse matrix and x, y are dense vectors. We extend SPARSITY to support tuning for a variety of common non-zero patterns arising in practice, and for additional kernels like sparse triangular solve (SpTS) and computation of ATA·x (or AAT·x) and A ρ·x. We develop new models to compute, for particular data structures and kernels, the best absolute performance (e.g., Mflop/s) we might expect on a given matrix and machine. These performance upper bounds account for the cost of memory operations at all levels of the memory hierarchy, but assume ideal instruction scheduling and low-level tuning. We evaluate our performance with respect to such bounds, finding that the generated and tuned implementations of SpMV and SpTS achieve up to 75% of the performance bound. This finding places limits on the effectiveness of additional low-level tuning (e.g., better instruction selection and scheduling). (Abstract shortened by UMI.)

279 citations

Patent
31 Mar 2011
TL;DR: In this article, the authors present a solution that makes data provably secure and accessible, by addressing data security at the bit level, thereby eliminating the need for multiple perimeter hardware and software technologies.
Abstract: The systems and methods of the present invention provide a solution that makes data provably secure and accessible—addressing data security at the bit level—thereby eliminating the need for multiple perimeter hardware and software technologies. Data security is incorporated or weaved directly into the data at the bit level. The systems and methods of the present invention enable enterprise communities of interest to leverage a common enterprise infrastructure. Because security is already woven into the data, this common infrastructure can be used without compromising data security and access control. In some applications, data is authenticated, encrypted, and parsed or split into multiple shares prior to being sent to multiple locations, e.g., a private or public cloud. The data is hidden while in transit to the storage location, and is inaccessible to users who do not have the correct credentials for access.

277 citations