G. Carrillo

Bio: G. Carrillo is an academic researcher from Claude Bernard University Lyon 1. The author has contributed to research in topics: Amplifier & CMOS. The author has an hindex of 3, co-authored 5 publications receiving 29 citations.

CMOS 32-APS linear array for high-sensitivity, low-resolution spectrophotometry

Abstract: This paper presents a CMOS 32-APS (active pixel sensor) linear array for high-sensitivity, low-resolution micro spectrophotometer. The APS employs a buried double junction (BDJ) detector, which has an improved spectral response when compared to the use of a CMOS photodiode, and allows wavelength discrimination for instrumental auto-calibration. The sensitivity is enhanced by using large pixel and small extra integration capacitor, with implementation of high-gain charge amplifier to minimize effects of detector's junction capacitors. The APS features two channels: well channel and diffusion one. Each channel performs charge amplification and correlated double sampling (CDS) with buffered output. The well channel is read for photometric measurement, while both channels are exploited for wavelength detection. The in-pixel CDS circuits allow synchronous sampling of all APS, which improves readout rate. The fabricated linear array in a 0.8-μm CMOS process has been tested. The evaluated sensitivity of the APS is about 14 V/lx s @ 555 nm for the well channel. Under a 3.3 V supply, the dynamic range (DR) of the APS for a fixed integration time is about 50 dB for both channels. By varying integration duration, a DR over 130 dB for both channels can be reached. For photometric measurement, the minimum detectable signal using 125 s integration is about 1 μlx @ 555 nm.

A Novel Approach to Implementing On-Chip Synchronous Detection for CMOS Optical Detector Systems

Abstract: A phase-switching approach suppresses the need to employ a precise multiplier for synchronous demodulation An improved solution for implementing on-chip synchronous detection consists of using a switched-phase amplifier, which combines pre-amplification and phase-switching operations This enables circuit simplification, voltage lowering, and power and surface savings A detector-associated circuit realising pre-amplification and synchronous demodulation is proposed It includes a transimpedance amplifier, a switched-phase amplifier and a low-pass filter All these building blocks are designed to operate under a minimum supply of 2 V, using a double-poly, 08-μm CMOS process The designed circuit is to be integrated with a CMOS optical detector for portable applications System-level simulations (including the detector model) are performed to validate the system operation, and to estimate performances The sensitivity of the system in terms of minimum detectable optical signal (which is synchronously modulated) is evaluated to be 22 10−14 W/mm2 in normal measuring conditions

On-chip synchronous detection for CMOS BDJ optical detector

Abstract: On-chip electronics performing weak-signal recovery for CMOS BDJ (Buried Double p-n Junction) optical detector is proposed. It includes two identical channels for simultaneous processing of both detector's output signals in continuous-time configuration. Each channel consists of a transimpedance amplifier, a fully differential amplifier, a multiplier and a low-pass filter, thus performing low-noise preamplification and synchronous demodulation. Some key building blocks have been designed with performance optimization. In order to validate the proposed architecture, to verify the system operation and to estimate its performances and characteristics, system-level simulations have been carried out. It has been evaluated that, in a typical case, the integrated system can detect an input optical signal of 21 fW/mm2.© (2002) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

On-chip synchronous detection for CMOS photodetector

Abstract: A detector-associated circuit with a novel approach for implementing synchronous detection is proposed. A suggested phase-switching technique for synchronous demodulation obviates the need to employ a precise analog multiplier. By using a switched-phase amplifier to combine operations of additional amplification and phase-switching, the circuitry is substantially simplified. This approach enables voltage lowering, power and surface savings. The circuit is designed to operate under a low supply voltage down to 2 V, using a double-poly 0.8-/spl mu/m CMOS process. It is to be integrated with a CMOS photodiode for optical detection. The sensitivity of such a detection system is evaluated via noise analysis and simulations. A modulated optical signal of about 20 fW/mm/sup 2/ is still detectable.

CMOS BDJ detector array with charge preamplifiers for sensitive biochemical analysis

Abstract: For instrumental implementation of biochemical microanalysis techniques, we have designed a CMOS BDJ (buried double p-n junction) detector array and its associated charge amplifiers. The adopted amplifier configuration allows a high-sensitivity performance (100 V/lx.s@555 nm). The detector chip can operate in low-bias and low-temperature conditions, so as to lower the dark currents of the detector and to increase the integration time of the charge amplifiers. In such operating conditions, both MDSmin (minimum detectable signal) and DR (dynamic range) can be significantly improved. We have obtained, e.g., at -10degC, MDSmin = 1mulx@555 nm and DR = 135 dB.

Simultaneous actuation and displacement sensing for electrostatic drives

Abstract: This paper presents a method for driving a MEMS electrostatic actuator, while simultaneously sensing the resulting displacement/capacitance without the use of an additional physical sensing structure. The approach superposes the sensing and actuation signals into a single input into the system and obtains its mechanical (displacement) response from the modulation (amplitude or phase) it produces on the sensing input. The approach is analyzed and experimentally shown to produce an amplitude modulation of 0.1857 mV µm−1 of displacement on electrostatic drive that produces a displacement of 14 µm at 100 V and a 0.55 pF capacitance change from a nominal capacitance of 0.35 Pico farads. The approach enables a very cost-effective and convenient approach to detect the displacement of MEMS devices for a variety of applications in the laboratory environment, and provide a potential feedback signal for closed-loop control of electrostatically driven MEMS devices.

A Review of the CMOS Buried Double Junction (BDJ) Photodetector and its Applications

Abstract: A CMOS Buried Double Junction PN (BDJ) photodetector consists of two vertically-stacked photodiodes. It can be operated as a photodiode with improved performance and wavelength-sensitive response. This paper presents a review of this device and its applications. The CMOS implementation and operating principle are firstly described. This includes the description of several key aspects directly related to the device performances, such as surface reflection, photon absorption and electron-hole pair generation, photocurrent and dark current generation, etc. SPICE modelling of the detector is then presented. Next, design and process considerations are proposed in order to improve the BDJ performance. Finally, several BDJ-detector-based image sensors provide a survey of their applications.

CMOS Low-Power Lock-In Amplifiers With Signal Rectification in Current Domain

Abstract: This paper presents the design and experimental characterization of two lock-in amplifier (LIA) prototypes integrated in a 0.18- $\mu $ m CMOS process with a single supply voltage of 1.8 V. As opposed to previously reported integrated LIAs, synchronous rectification is performed in the current domain, providing key features such as low power ( $\mu $ W) and reduced area $(0.013~\mathrm{mm}^{2}$ ), with a dynamic reserve better than 35 dB and less than 5% relative error in the signal recovery. The principle of operation of each prototype is presented and their performance is compared with previous implementations, validating their suitability for low-cost portable applications.

An integrated low-power lock-in amplifier and its application to gas detection.

Abstract: This paper presents a new micropower analog lock-in amplifier (LIA) suitable for battery-operated applications thanks to its reduced size and power consumption as well as its operation with single-supply voltage. The proposed LIA was designed in a 0.18 µm CMOS process with a single supply voltage of 1.8 V. Experimental results show a variable DC gain ranging from 24.7 to 42 dB, power consumption of 417 µW and integration area of 0.013 mm2. The LIA performance was demonstrated by measuring carbon monoxide concentrations as low as 1 ppm in dry N2. The experimental results show that the response to CO of the sensing system can be considerably improved by means of the proposed LIA.

Design of an APS CMOS image sensor for low light level applications using standard CMOS technology

Abstract: CMOS image sensors (or APS: Active pixel sensors) are now the technology of choice for most imaging applications, such as digital video cameras. Whereas their sensitivity doesn't reach the one of the best actual CCD's (whose fill factor is about 100%), they are now commonly used because of their multiple functionalities (windowing, on-chip signal processing) and their easy serial fabrication. In this paper, we present a study of different pixel photodiodes and architectures, in order to increase their sensitivity and reduce their spatial and temporal noise. These chips will be used in satellite star trackers, and should be hardened to radiation. Two different architectures are investigated. The first one uses the photodiode capacitance for signal integration, as it is usually done in literature [1–3]. This capacitance should be as lower as possible, to increase conversion factor (the gain of the pixel) and reduce reset noise, and that's why different standard CMOS photodiodes have been studied and quantified. The second architecture uses a low-value poly1/poly2 capacitor inside each pixel for signal integration, thus resulting in increasing the gain but degrading the fill factor.