This paper reviews the fundamentals and latest progress of modeling, analysis, and design technologies for signal integrity and electromagnetic compatibility on PCB and package in the past decades. Most results in this field are based on the very rich and highly educational literature produced by Prof. C. Paul in his long scientific career. The inclusion of parameters variability effects is also considered, and it is demonstrated how statistical simulations can become affordable by means of recently-introduced stochastic methods. Finally, the necessity of practical training of designers is mentioned, and an experience relying on realistic PCB demonstrators is illustrated.

Overview of Signal Integrity and EMC Design Technologies on PCB: Fundamentals and Latest Progress

The ever-increasing demands of digital computing and wireless communication have been driving the semiconductor technology to change with each passing day. Modern electronic systems integrate more complex components and devices, which results in a very complex electromagnetic (EM) field environment. EM compatibility has become one of the major issues in ICs redesign, mainly due to the lack of efficient and accurate simulation tools and expertise on noise reduction and immunity improvement. This paper reviews the state of the arts of IC, electronic package, and printed circuit board simulation and modeling technologies. It summarizes the modeling technologies for both available structures [multilayered power-ground planes and macromodeling of interconnect (INC)] and novel structures (nano-INCs and 3-D ICs based on through-silicon via technology). It also illustrates the trends of simulation and modeling technologies in EM compatibility, signal integrity, and power integrity.

Progress Review of Electromagnetic Compatibility Analysis Technologies for Packages, Printed Circuit Boards, and Novel Interconnects

Analytical models for vias and traces are presented for simulation of multilayer interconnects at the package and printed circuit board levels. Vias are modeled using an analytical formulation for the parallel-plate impedance and capacitive elements, whereas the trace-via transitions are described by modal decomposition. It is shown that the models can be applied to efficiently simulate a wide range of structures. Different scenarios are analyzed including thru-hole and buried vias, power vias, and coupled traces routed into different layers. By virtue of the modal decomposition, the proposed method is general enough to handle structures with mixed reference planes. For the first time, these models have been validated against full-wave methods and measurements up to 40 GHz. An improvement on the computation speed of at least two orders of magnitude has been observed with respect to full-wave simulations.

Physics-Based Via and Trace Models for Efficient Link Simulation on Multilayer Structures Up to 40 GHz

After providing an overview of the state-of-the-art in power distribution design and modeling, this paper focuses on return path discontinuities (RPDs) for I/O signaling. After briefly describing their importance in the context of simultaneous switching noise, a specific case of RPD based on via discontinuities is discussed in detail in the context of both the frequency- and time-domain waveforms using a test vehicle. The modeling of RPD in practical packages and printed circuit boards is addressed along with substrate coupling due to nonideal reference planes. Finally, a high-impedance power distribution scheme for I/O signaling is presented that can potentially solve a number of RPD-related problems, followed by future challenges.

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Designing and Modeling for Power Integrity

Power/ground planes in electronic packaging can be a major factor for noise coupling. There can be noise coupling not only in the transversal direction between two planes, but also vertically from one plane pair to another through the apertures and via holes. Due to the large size of the power/ground planes, it is difficult to analyze them using full-wave simulators. It is known that the finite-difference solution of the Helmholtz equation provides a faster approach with comparable accuracy. For multilayered planes and arbitrary geometries with aperture coupling, we present a multilayered finite-difference method (MFDM). It provides an accurate representation of wrap-around currents, which have not been modeled earlier, for large cutouts. Estimation of the influence of such coupling effects are essential especially for a successful design of mixed-signal systems. This method allows to consider realistic structures, which would be prohibitive to simulate using full-wave simulators.

Multilayered Finite-Difference Method (MFDM) for Modeling of Package and Printed Circuit Board Planes

In this paper, a stripline model is presented for coupled signal lines routed between a power and a ground plane based on multiconductor transmission line (MTL) theory. Through a suitable diagonalization of the MTL equations for striplines, the transverse electromagnetic (TEM) parallel-plate mode is decoupled from the stripline mode. In this way, stripline models that are obtained assuming ideal planes at ground potential can be extended to take into account the nonideal behavior of the planes. The presented model is applied to represent mode conversion due to vias, holes in the reference planes, and terminations of the stripline. Influence of inhomogeneous media is discussed

Modeling of striplines between a power and a ground plane

Skyrocketing growth in the cellular personal communications services (PCS) sector has fueled the needs for higher density, more functionality, and greater performance on both handset and base stations. Third generation wireless standards, which require hardware upgrades, loom on the horizon. RF component suppliers are scrambling to find solutions at the IC, package, and PCB levels to meet these challenges. RF module packaging is considered as one of the low cost solutions for the future wireless products. One of the critical design needs for RF interconnects is to understand the electrical performance of wire bond (the RF interconnect of choice) at and above frequency of interest, and to determine the performance limit for the wire bond chip-to-substrate interconnect. The availability of design kit or library would result in a substantial reduction in design cycle times. Using wire bond as example, this paper illustrates the developmental stages that turn electromagnetic characteristics of a physical structure into a design library. Fullwave simulation using Ansoft HFSS and compact models extraction using optimization tool for wire bond are shown, followed by in-depth discussions of wire bond parameterized models. Validation of parameterized model by measurement is presented.

Parameterized models for a RF chip-to-substrate interconnect

In this paper, equivalent circuit representations for frequency-dependent RLGC (resistance, inductance, conductance and capacitance) parameters of interconnects are presented. Several novel approaches are proposed and compared with each other to model the frequency-dependent behaviour of interconnects due to substrate and conductor losses. The network representations are obtained by network synthesis of suitable non-rational immittances based on analytical methods. Due to the closed-form description of the circuit elements, which consist of positive-valued resistors, inductors, and capacitors, the proposed models can be conveniently implemented in generic circuit simulators. Copyright © 2005 John Wiley & Sons, Ltd.

Closed-form network representations of frequency-dependent RLGC parameters

The electrostatic discharge (ESD) sensitivity of integrated circuits with respect to the charged device model depends strongly on the package. Electrical characteristics of a package are, if at all extracted, application specific. They depend on the environment e.g. the PCB. This paper characterises the package for the 1st time taking into account the CDM tester environment. The extracted parameters are a prerequisite for circuit simulation of integrated circuits under CDM-stress

Electrical characterisation of a power SO-package in the context of electrostatic discharge

Lumped models that represent a lossy substrate with constant loss tangent over a given bandwidth are presented. Two network representations are given, which are based on the continued fraction expansion (CFE) of a causal network function, and the Debye model. Proposed models are compared with per unit length conductance and capacitance extracted from measurements of a stripline using the calibration comparison method.

G. Sommer

Papers

Modeling of striplines between a power and a ground plane

Parameterized models for a RF chip-to-substrate interconnect

Closed-form network representations of frequency-dependent RLGC parameters

Electrical characterisation of a power SO-package in the context of electrostatic discharge

Time-domain modeling of lossy substrates with constant loss tangent