G.W. Taylor

Bio: G.W. Taylor is an academic researcher from Honeywell. The author has contributed to research in topics: Capacitance & Diffusion capacitance. The author has an hindex of 1, co-authored 1 publications receiving 14 citations.

C-V characteristics of ion implanted depletion IGFETs and buried channel CCDs

Abstract: Capacitance voltage measurements of ion implanted devices for several circuit connections are presented and interpreted in terms of a simple constant profile approximation. Based on this model the device capacitance is described quantitatively in terms of the series combination of a p−n junction capacitance and a conventional MOS capacitance. It is shown that shallow and deep implants reveal characteristically distinctive C-V curves which provide an immediate rough estimate of the implant depth. Analysis of the model yields directly, important parameters for first order design purposes. It is also shown that the measurements provide a simple diagnostic technique to examine the physics of the implanted structure. The use of the simplified model is justified by the agreement between experimental and calculated values.

Characteristics of inversion-channel and buried-channel MOS devices in 6H-SiC

Abstract: Inversion-channel and buried-channel gate-controlled diodes and MOSFET's are investigated in the wide bandgap semiconductor 6H-SiC. These devices are fabricated using thermal oxidation and ion implantation. The gate-controlled diodes allow room temperature measurement of surface states, which is difficult with MOS capacitors due to the 3 eV bandgap of 6H-SiC. An effective electron mobility of 20 cm/sup 2//Vs is measured for the inversion-channel devices and a bulk electron mobility of 180 cm/sup 2//Vs is found in the channel of the buried-channel MOSFET. The buried-channel transistor is the first ion-implanted channel device in SIC and the first buried-channel MOSFET in the 6H-SiC polytype. >

Analysis of the deep depletion MOSFET and the use of the d.c. characteristics for determining bulk-channel charge-coupled device parameters

Abstract: A qualitative and quantitative analysis of the deep depletion MOSFET operated in the regimes of depletion, enhancement and depletion/enhancement, is presented The quantitative analysis presented here does not make any of the simplifications made in some earlier papers, applicable to shallow channel depletion MOSFETs, and uses a four terminal device model so as to provide a complete set of characterisation equations for each mode of operation It is demonstrated that the device parameters of flatband voltage, implanted channel doping and depth, and bulk and surface carrier mobilities, can easily be determined by use of some of the characteristics equations in conjunction with simple measurements made directly from the drain current/drain voltage characteristics Furthermore these parameters are applicable to bulk-channel charge-coupled devices fabricated under the same implantation and drive-in conditions As the device parameters are determined from the drain current/drain voltage characteristics the techniques presented offer an attractive alternative to the more complicated C-V methods used for bulk-channel charge-coupled device characterisation The validity of the model and the techniques used to determine the device parameters is demonstrated by the good agreement between calculated and measured results obtained from fabricated devices

Capacitance and doping profiles of ion-implanted, buried-channel MOSFETs

Abstract: Detailed capacitance measurements are presented of large-area, ion-implanted, buried-channel MOSFETs. The gate capacitance was measured as a function of gate-substrate voltage with drain (source)-substrate voltage as parameter. The MOSFETs were prepared on 10 Ω-cm, n -type, 〈111〉 Si. Boron ions with doses of 4 × 10 11 and 8 × 10 11 / cm 2 were implanted through the gate oxide to a depth of 0.30–0.35 μ m in the Si. The devices were subjected to heat treatments of 900–1100°C. Calculated capacitances based on a one-dimensional, partial-ionization model are in good agreement with experiment. The model is used to assess the validity of C – V profiling technique based on the abrupt space-charge approximation. It is concluded that the impurity distribution can be measured quite accurately near the peak of the profile, for ion-implantation and heat-treatment conditions examined in this paper. However, the “tails” of the distribution cannot be measured with this technique. The limitations of the C – V profiling method are discussed quantitatively for a stepped profile.

Measurements of residual defects and 1/f noise in ion-implanted p-channel MOSFET's

Abstract: This paper describes the measurements of excess noise and residual defects of extremely low concentrations ( 2 or an Ar ambient for 20 min at various temperatures. For11B+-implanted MOSFET's after annealing above 1000°C, a high residual defect concentration was observed near the conduction band edge; whereas after annealing the defect density as a result of28Si+or31p+implantation was equal to that of control MOSFET's. The density-of-state data agree with the equilibrium measurements of excess ( 1/f ) noise power. The excess noise was measured as a function of the drain current. The distribution of 1/f noise power versus potential minimum of holes in the equilibrium condition is similar to that of interface state density. In nonequilibrium operation, a reduction of excess noise was achieved owing to the presence of buried channel created by ion implant.

Characterization of MOS structures with buried layers

Abstract: After boron implantation into n-type silicon the shapes of the MOS C–V curves differ considerably from those of non-implanted samples. A general equivalent network is presented. Beside the p-n junctions other components due to lateral current flow are included in this network. Admittance and crosstalk experiments verify the proposed model. The data evaluation according to this model allows the destruction-free determination of the spreading resistance and a control of the implantation data. Nach Bor-Implantation in n-Typ-Silizium unterscheiden sich die MOS-C–V-Kurven betrachtlich von denen nichtimplantierter Proben. Ein allgemeines Ersatzschaltbild wird vorgestellt. Neben den p-n-Ubergangen sind noch andere Komponenten – hervorgerufen durch seitlichen Stromflus – in diesem Netzwerk enthalten. Admittanz- und Ubersprechexperimente bestatigen das vorgeschlagene Modell. Die Datenauswertung nach diesem Modell erlaubt eine zerstorungsfreie Bestimmung des Ausbreitungswiderstandes und eine Kontrolle der Implantation.