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Author

George D. Kamian

Bio: George D. Kamian is an academic researcher. The author has contributed to research in topics: Layer (electronics) & Wafer. The author has an hindex of 9, co-authored 12 publications receiving 199 citations.

Papers
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Patent
28 Mar 2012
TL;DR: In this article, a backplane for back contact solar cells that provides for solar cell substrate reinforcement and electrical interconnects is described, and the method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate.
Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepeg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepeg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepeg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepeg backplane.

40 citations

Patent
09 Aug 2012
TL;DR: In this article, the fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication method and structures for forming thin film backcontact solar cells are described.
Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication methods and structures for forming thin film back contact solar cells are described.

36 citations

Patent
05 May 2010
TL;DR: In this article, the authors present a disclosure enabling high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multilayer porosity layers), optical reflectors, and multi-junction, multi-band gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell).
Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

28 citations

Patent
12 Feb 2011
TL;DR: In this article, the authors present manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing substrate manufacturing throughput and reducing the substrate manufacturing cost.
Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.

18 citations

Patent
09 Jun 2011
TL;DR: In this article, a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor.
Abstract: High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.

17 citations


Cited by
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Patent
25 Jun 2015
TL;DR: In this paper, the authors described the methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells.
Abstract: Methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A Group III-nitride material layer is disposed above the passivating dielectric layer. In another example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A large direct band gap material layer is disposed above the passivating dielectric layer, the large direct band gap material layer having an energy gap (Eg) of at least approximately 3.3. An anti-reflective coating (ARC) layer disposed on the large direct band gap material layer, the ARC layer comprising a material different from the large direct band gap material layer.

106 citations

Patent
09 Dec 2010
TL;DR: The back contact back junction solar cell as discussed by the authors comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and an doped backside emitter region with a polarity opposite the doped ground region.
Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.

77 citations

Patent
29 Aug 2011
TL;DR: In this article, an anti-reflection layer is deposited on top of a semiconductor structure to form a photovoltaic structure, and a front-side electrode grid comprising a metal stack is formed.
Abstract: One embodiment of the present invention provides a method for fabricating solar cells. During operation, an anti-reflection layer is deposited on top of a semiconductor structure to form a photovoltaic structure, and a front-side electrode grid comprising a metal stack is formed on top of the photovoltaic structure. The metal stack comprises a metal-adhesive layer comprising Ti or Ta, and a conducting layer comprising Cu or Ag situated above the metal-adhesive layer.

63 citations

Patent
05 Aug 2011
TL;DR: In this paper, a backplane for back contact solar cells that provides for solar cell substrate reinforcement and electrical interconnects is described, which comprises depositing an inter-digitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the inter-determined pattern, and attaching a second backplane having a second inter-decomposition pattern of EB electrodes and EB electrodes at the conductive EB and EB plugs.
Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.

63 citations

Patent
09 Jan 2015
TL;DR: In this paper, a front-side cover, a back-side covers, and a plurality of solar cells are arranged between the front-and back-sides of a solar module.
Abstract: One embodiment of the present invention provides a solar module. The solar module includes a front-side cover, a back-side cover, and a plurality of solar cells situated between the front- and back-side covers. A respective solar cell includes a multi-layer semiconductor structure, a front-side electrode situated above the multi-layer semiconductor structure, and a back-side electrode situated below the multi-layer semiconductor structure. Each of the front-side and the back-side electrodes comprises a metal grid. A respective metal grid comprises a plurality of finger lines and a single busbar coupled to the finger lines. The single busbar is configured to collect current from the finger lines.

57 citations