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Author

Ghulam Mehdi

Bio: Ghulam Mehdi is an academic researcher from Beihang University. The author has contributed to research in topics: Noise figure & Band-pass filter. The author has an hindex of 7, co-authored 24 publications receiving 111 citations. Previous affiliations of Ghulam Mehdi include New England School of Communications & Center for Excellence in Education.

Papers
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Journal ArticleDOI
TL;DR: A novel control strategy is devised that utilizes backstepping inspired integral sliding mode control to maintain a constant dc link voltage and control power flow to the grid and better and superior performance is observed in transient response, total harmonic distortion minimization and integrating power into the grid at unity power factor.
Abstract: In modern electrical systems, solar energy extracted is integrated into electrical grid using power converters. In most cases, several inverters are connected across the same dc link so that the circulating currents between the inverter are made zero and the input power is shared among the available inverters. Because of the nonlinear nature of grid-tied photovoltaic (PV) system and the inherent modeling uncertainties, conventional control schemes cannot provide satisfactory performances under all operating conditions. Nonlinear control techniques for grid-tied inverter have been explored in this paper. However, the design of nonlinear controllers for the control of grid-tied parallel inverters has been rarely reported. Therefore, the purpose of this paper is to design a nonlinear controller for the control of grid-tied parallel inverter system. A novel control strategy is devised that utilizes backstepping inspired integral sliding mode control to maintain a constant dc link voltage and control power flow to the grid. An algorithm is developed, which determines the number of inverters connected across the dc link. The control strategy employs Lyapunov approach to ensure stability in an event of disturbance and guarantees robustness. With the proposed control scheme, better and superior performance is observed in transient response, total harmonic distortion minimization and integrating power into the grid at unity power factor. Furthermore, with the control strategy, the available power from the PV array is successfully distributed among multiple inverters operating in parallel.

21 citations

Proceedings ArticleDOI
03 Apr 2012
TL;DR: The design considerations for millimeter wave Fod radar system operating at Ka-band are discussed and a simulation platform comprising of FOD radar model and test setup for design evaluation is presented.
Abstract: Presence of Foreign object debris (FOD) at airport runways is an immense threat to flight safety operation. Such unwanted objects may cause potential damage to the aircraft during critical phases like take off and landing. Due to the miniaturized nature of FOD parts, a very high resolution sensor is required to resolve and locate such objects with higher extent of accuracy such as less than 1 meter. The reported FOD systems operate at W-band. This paper discusses the design considerations for millimeter wave FOD radar system operating at Ka-band and presents a simulation platform comprising of FOD radar model and test setup for design evaluation. The radar model is developed using the specifications of the selected commercially off-the-shelf (COTS) components and is evaluated under different scenarios in ADS®. The design addresses inherent issues associated with FMCW architecture such as mutual coupling between transmit and receive antennae and self mixing due to substrate coupling. For improved azimuth accuracy, two channels receiver for amplitude comparison monopulse is incorporated. Transmit power is 10 dBm and receiver's minimum detectable strength is −122 dBm. The simulation results indicate radar's ability to detect very small objects − 20 dBsm radar cross section (RCS) up to 300 meter range.

18 citations

Journal ArticleDOI
Chen Chen1, Ghulam Mehdi, Chao Wang1, Umar Dilshad1, Anyong Hu1, Jungang Miao1 
TL;DR: The design and measurement of a power detector circuit based on the 0.15- $\mu \text{m}$ GaAs pHEMT technology and its usage in complex cross correlation measurement are presented.
Abstract: The design and measurement of a power detector circuit based on the 0.15- $\mu \text{m}$ GaAs pHEMT technology and its usage in complex cross correlation measurement are presented in this article. The six-port technology is employed for the calculation of the cross correlation, and the design equations from the requirements of the correlation measurement are provided to guide the power detector design. The relation between the signal-to-noise ratio (SNR) of the correlation results and the load resistor is deduced, which can restrict the resistor value choice for an acceptable SNR. By properly choosing the load resistor and the biasing of the transistor, a power detector circuit is designed with a suppressed output dc voltage variation resulting from the statistic feature of monolithic microwave integrated circuit (MMIC) production. A fabricated detector chip has been mounted onto a printed circuit board and has been characterized. The measurement results show a flat responsivity over 3.5–8 GHz and a 3-nV/ $\sqrt {\mathrm{ Hz}}$ output noise voltage spectrum. The complex cross correlation measurement is implemented using two power detector modules with carefully chosen bias currents. Across the frequency range of 3.5–8 GHz, the measured correlation circles have an amplitude imbalance of 3.5 dB and an axial ratio from 0.85 to 1.15. With an input power of −5 dBm, the measured SNR of the correlator output is above 26 dB.

14 citations

Journal ArticleDOI
TL;DR: In this paper, a round-corner design of an all symmetric edge-coupled bandpass fllter (BPF) was proposed to compensate the open-end efiect in the half-wavelength resonator section with the round-ended corners rather than decrementing the lengths in a conventional way.
Abstract: The round-corner design of an all symmetric edge-coupled bandpass fllter (BPF) is presented. The manufacturing tolerances and its efiects of frequency shift on the design of the edge-coupled are investigated. Consequently, the round-ended design method is proposed in order to compensate the open-end efiect in the half- wavelength resonator section with the round-ended corners rather than decrementing the lengths in a conventional way, and an experience formula and a corresponding procedure are devised for the design of such fllters. The widths of all the half-wavelength resonators are set equal to avoid discontinuities in the interior of the fllter. The fllter is realized on a ceramic fllled soft substrate with dielectric constant of 6.2. For obtaining the de-embedded measured results at the device plane an in-house customized through-re∞ect-line (TRL) calibration kit is produced. Three kinds of fllters at difierent center frequencies are manufactured, and their measured results are in good agreement with the simulated ones after calibration.

14 citations

Journal ArticleDOI
Xiangzhou Guo1, Ghulam Mehdi, Muhammad Asif1, Anyong Hu1, Jungang Miao1 
TL;DR: A comparator-based 1-bit/2-level (1B/2L) A/D conversion architecture is presented and it is found that the correlation efficiency degradation to less than 98% is caused by the threshold offsets of comparators which can be compensated using a digital-to-analog converter (DAC) or programmable potentiometer.
Abstract: Interferometric aperture synthesis is a proven technique in radio astronomy and earth remote sensing, which also shows great potentials in security screening. An aperture synthesis passive millimeter-wave (PMMW) imager is under development at Beihang University, which is designed for concealed contraband detection on the human body in an indoor environment. This imager uses 256 antenna-receiver channels with 1 GHz bandwidth and can obtain a radiometric sensitivity less than 1 K at a video imaging rate (~25 frame/s). One of the greatest challenges in this system is the development of a digital correlation subsystem capable of analog-to-digital (A/D) conversion and subsequent signal processing among the system's 256 channels. In this paper, a comparator-based 1-bit/2-level (1B/2L) A/D conversion architecture is presented. The main error sources during sampling are identified as the timing error of sampling clocks and threshold offset of comparators and analyzed in detail. The sampled data are captured by field programmable gate arrays (FPGAs) to perform further signal processing, and a data capture module performing the serial-to-parallel conversion and per-bit deskew is designed in the FPGA to transfer sampled data from the sampling clock domain to the internal processing clock domain. A 64-channel test system is built to verify the design, and a correlation efficiency of 92.5% to 99.6% is observed at 1 GHz sampling frequency. It is found that the correlation efficiency degradation to less than 98% is caused by the threshold offsets of comparators which can be compensated using a digital-to-analog converter (DAC) or programmable potentiometer.

11 citations


Cited by
More filters
01 Apr 1983

405 citations

Book ChapterDOI
01 Jan 2003
TL;DR: In this paper, an expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Abstract: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

207 citations

Book
01 May 1989

101 citations

Book ChapterDOI
Behzad Razavi1
01 Jan 1996

86 citations

Journal ArticleDOI
TL;DR: The structure regulator for the perturbations attenuation which is based on the infinite structure regulator is studied and it is applied to a quadrotor which maintains the horizontal position with respect to the earth for the step and sine perturbation.
Abstract: In this work, we study the structure regulator for the perturbations attenuation which is based on the infinite structure regulator. The structure regulator is able to attenuate the perturbations if the transfer function of the departures and perturbations has a numerical value almost equal to zero, and it does not require the perturbations to attenuate them. We apply the structure regulator and the infinite structure regulator to a quadrotor which maintains the horizontal position with respect to the earth for the step and sine perturbations.

72 citations