Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

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High-κ gate dielectrics: Current status and materials properties considerations

Atomic layer deposition: an overview.

We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.

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Science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems

Atomic layer deposition(ALD), a chemical vapor deposition technique based on sequential self-terminating gas–solid reactions, has for about four decades been applied for manufacturing conformal inorganic material layers with thickness down to the nanometer range. Despite the numerous successful applications of material growth by ALD, many physicochemical processes that control ALD growth are not yet sufficiently understood. To increase understanding of ALD processes, overviews are needed not only of the existing ALD processes and their applications, but also of the knowledge of the surface chemistry of specific ALD processes. This work aims to start the overviews on specific ALD processes by reviewing the experimental information available on the surface chemistry of the trimethylaluminum/water process. This process is generally known as a rather ideal ALD process, and plenty of information is available on its surface chemistry. This in-depth summary of the surface chemistry of one representative ALD process aims also to provide a view on the current status of understanding the surface chemistry of ALD, in general. The review starts by describing the basic characteristics of ALD, discussing the history of ALD—including the question who made the first ALD experiments—and giving an overview of the two-reactant ALD processes investigated to date. Second, the basic concepts related to the surface chemistry of ALD are described from a generic viewpoint applicable to all ALD processes based on compound reactants. This description includes physicochemical requirements for self-terminating reactions,reaction kinetics, typical chemisorption mechanisms, factors causing saturation, reasons for growth of less than a monolayer per cycle, effect of the temperature and number of cycles on the growth per cycle (GPC), and the growth mode. A comparison is made of three models available for estimating the sterically allowed value of GPC in ALD. Third, the experimental information on the surface chemistry in the trimethylaluminum/water ALD process are reviewed using the concepts developed in the second part of this review. The results are reviewed critically, with an aim to combine the information obtained in different types of investigations, such as growth experiments on flat substrates and reaction chemistry investigation on high-surface-area materials. Although the surface chemistry of the trimethylaluminum/water ALD process is rather well understood, systematic investigations of the reaction kinetics and the growth mode on different substrates are still missing. The last part of the review is devoted to discussing issues which may hamper surface chemistry investigations of ALD, such as problematic historical assumptions, nonstandard terminology, and the effect of experimental conditions on the surface chemistry of ALD. I hope that this review can help the newcomer get acquainted with the exciting and challenging field of surface chemistry of ALD and can serve as a useful guide for the specialist towards the fifth decade of ALD research.

Surface chemistry of atomic layer deposition: A case study for the trimethylaluminum/water process

Wide-band-gap oxides such as SrTiO3 are shown to be critical tests of theories of Schottky barrier heights based on metal-induced gap states and charge neutrality levels. This theory is reviewed and used to calculate the Schottky barrier heights and band offsets for many important high dielectric constant oxides on Pt and Si. Good agreement with experiment is found for barrier heights. The band offsets for electrons on Si are found to be small for many key oxides such as SrTiO3 and Ta2O5 which limit their utility as gate oxides in future silicon field effect transistors. The calculations are extended to screen other proposed oxides such as BaZrO3. ZrO2, HfO2, La2O3, Y2O3, HfSiO4, and ZrSiO4. Predictions are also given for barrier heights of the ferroelectric oxides Pb1−xZrxTiO3 and SrBi2Ta2O9 which are used in nonvolatile memories.

Band offsets of wide-band-gap oxides and implications for future electronic devices

Hafnium and zirconium silicate (HfSixOy and ZrSixOy, respectively) gate dielectric films with metal contents ranging from ∼3 to 30 at. % Hf, or 2 to 27 at. % Zr (±1 at. % for Hf and Zr, respectively, within a given film), have been investigated, and films with ∼2–8 at. % Hf or Zr exhibit excellent electrical properties and high thermal stability in direct contact with Si. Capacitance–voltage measurements show an equivalent oxide thickness tox of about 18 A (21 A) for a 50 A HfSixOy (50 A ZrSixOy) film deposited directly on a Si substrate. Current–voltage measurements show for the same films a leakage current of less than 2×10−6 A/cm2 at 1.0 V bias. Hysteresis in these films is measured to be less than 10 mV, the breakdown field is measured to be EBD∼10 MV/cm, and the midgap interface state density is estimated to be Dit∼1–5×1011 cm−2 eV−1. Au electrodes produce excellent electrical properties, while Al electrodes produce very good electrical results, but also react with the silicates, creating a lower e l...

Hafnium and zirconium silicates for advanced gate dielectrics

Hafnium silicate (HfSixOy) gate dielectric films with ∼6 at. % Hf exhibit significantly improved leakage properties over SiO2 in the ultrathin regime while remaining thermally stable in direct contact with Si. Capacitance–voltage measurements show an equivalent oxide thickness (tox) of less than 18 A for a 50 A HfSixOy film deposited directly on a Si substrate, with no significant dispersion of the capacitance for frequencies ranging from 10 kHz to 1 MHz. Current–voltage measurements show for the same film a leakage current of 1.2×10−6 A/cm2 at 1 V bias. Hysteresis in these films is measured to be less than 20 mV, the breakdown field is measured to be EBD∼10 MV/cm, and the midgap interface state density is Dit∼1011 cm−2 eV−1. Cross-sectional transmission electron microscopy shows no signs of reaction or crystallization in HfSixOy films on Si after being annealed at 800 °C for 30 min.

Electrical properties of hafnium silicate gate dielectrics deposited directly on silicon

A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide.

Zirconium and/or hafnium oxynitride gate dielectric

Zirconium silicate (ZrSixOy) gate dielectric films with ∼3–5 at. % Zr exhibit excellent electrical properties and high thermal stability in direct contact with Si. We demonstrate an equivalent oxide thickness of about 21 A for a 50 A ZrSixOy film sputter-deposited directly on a Si substrate, as measured by capacitance–voltage techniques, with a hysteresis shift less than 10 mV. Leakage currents for these films are very low, approximately 1×10−6 A/cm2 at 1.0 V bias in accumulation. Films ramped to hard breakdown exhibit breakdown fields Ebd ∼10 MV/cm. Excellent electrical properties are obtained with Au electrodes, in particular.

Stable zirconium silicate gate dielectrics deposited directly on silicon

High-performance metal-oxide-semiconductor field effect transistors (MOSFETs) on III–V semiconductors have long proven elusive. High-permittivity (high-κ) gate dielectrics may enable their fabrication. We have studied hafnium oxide and aluminum oxide grown on gallium arsenide by atomic layer deposition. As-deposited films are continuous and predominantly amorphous. A native oxide remains intact underneath HfO2 during growth, while thinning occurs during Al2O3 deposition. Hydrofluoric acid etching prior to growth minimizes the final interlayer thickness. Thermal treatments at ∼600°C decompose arsenic oxides and remove interfacial oxygen. These observations explain the improved electrical quality and increased gate stack capacitance after thermal treatments.

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Glen D. Wilk

Papers

Hafnium and zirconium silicates for advanced gate dielectrics

Electrical properties of hafnium silicate gate dielectrics deposited directly on silicon

Zirconium and/or hafnium oxynitride gate dielectric

Stable zirconium silicate gate dielectrics deposited directly on silicon

HfO2 and Al2O3 gate dielectrics on GaAs grown by atomic layer deposition