Emerging challenges and materials for thermal management of electronics

The long-standing popularity of thermoelectric materials has contributed to the creation of various thermoelectric devices and stimulated the development of strategies to improve their thermoelectric performance. In this review, we aim to comprehensively summarize the state-of-the-art strategies for the realization of high-performance thermoelectric materials and devices by establishing the links between synthesis, structural characteristics, properties, underlying chemistry and physics, including structural design (point defects, dislocations, interfaces, inclusions, and pores), multidimensional design (quantum dots/wires, nanoparticles, nanowires, nano- or microbelts, few-layered nanosheets, nano- or microplates, thin films, single crystals, and polycrystalline bulks), and advanced device design (thermoelectric modules, miniature generators and coolers, and flexible thermoelectric generators). The outline of each strategy starts with a concise presentation of their fundamentals and carefully selected examples. In the end, we point out the controversies, challenges, and outlooks toward the future development of thermoelectric materials and devices. Overall, this review will serve to help materials scientists, chemists, and physicists, particularly students and young researchers, in selecting suitable strategies for the improvement of thermoelectrics and potentially other relevant energy conversion technologies.

Advanced Thermoelectric Design: From Materials and Structures to Devices

Neurons in the brain behave as nonlinear oscillators, which develop rhythmic activity and interact to process information. Taking inspiration from this behaviour to realize high-density, low-power neuromorphic computing will require very large numbers of nanoscale nonlinear oscillators. A simple estimation indicates that to fit 108 oscillators organized in a two-dimensional array inside a chip the size of a thumb, the lateral dimension of each oscillator must be smaller than one micrometre. However, nanoscale devices tend to be noisy and to lack the stability that is required to process data in a reliable way. For this reason, despite multiple theoretical proposals and several candidates, including memristive and superconducting oscillators, a proof of concept of neuromorphic computing using nanoscale oscillators has yet to be demonstrated. Here we show experimentally that a nanoscale spintronic oscillator (a magnetic tunnel junction) can be used to achieve spoken-digit recognition with an accuracy similar to that of state-of-the-art neural networks. We also determine the regime of magnetization dynamics that leads to the greatest performance. These results, combined with the ability of the spintronic oscillators to interact with each other, and their long lifetime and low energy consumption, open up a path to fast, parallel, on-chip computation based on networks of oscillators.

/pdf/neuromorphic-computing-with-nanoscale-spintronic-oscillators-3e3rewmz7x.pdf

Neuromorphic computing with nanoscale spintronic oscillators

The limitation of hot spot cooling in microchips represents an important hurdle for the electronics industry to overcome with coolers yet to exceed the efficiencies required. Nanotechnology-enabled heat sinks that can be magnetophoretically formed onto the hot spots within a microfluidic environment are presented. CrO2 nanoparticles, which are dynamically chained and docked onto the hot spots, establish tuneable high-aspect-ratio nanofins for the heat exchange between these hot spots and the liquid coolant. These nanofins can also be grown and released on demand, absorbing and releasing the heat from the hot spots into the microfluidic system. It is shown that both high aspect ratio and flexibility of the fins have a dramatic effect on increasing the heat sinking efficiency. The system has the potential to offer a practical cooling solution for future electronics.

Dynamic nanofin heat sinks

With the continual increase in cooling demand for microprocessors, there has been an increased focus within the microelectronics industry on developing thermal solutions. Thermal interface materials (TIMs) play a key role in thermally connecting various components of the thermal solution. Review of the progress made in the area of TIMs in the past five years is presented. The focus is on the rheology-based modeling and design of polymeric TIMs due to their widespread use. Review of limited literature on the thermal performance of solders is also provided. Merits and demerits of using nanoparticles and nanotubes for TIM applications are also discussed. I conclude the paper with some directions for the future that I feel are relatively untouched and potentially very beneficial

https://weble.upc.edu/ifsin/Block5/paper_proc7.pdf

Thermal Interface Materials: Historical Perspective, Status, and Future Directions

There is a significant need for site-specific and on-demand cooling in electronic, optoelectronic and bioanalytical devices, where cooling is currently achieved by the use of bulky and/or over-designed system-level solutions. Thermoelectric devices can address these limitations while also enabling energy-efficient solutions, and significant progress has been made in the development of nanostructured thermoelectric materials with enhanced figures-of-merit. However, fully functional practical thermoelectric coolers have not been made from these nanomaterials due to the enormous difficulties in integrating nanoscale materials into microscale devices and packaged macroscale systems. Here, we show the integration of thermoelectric coolers fabricated from nanostructured Bi2Te3-based thin-film superlattices into state-of-the-art electronic packages. We report cooling of as much as 15 degrees C at the targeted region on a silicon chip with a high ( approximately 1,300 W cm-2) heat flux. This is the first demonstration of viable chip-scale refrigeration technology and has the potential to enable a wide range of currently thermally limited applications.

On-chip cooling by superlattice-based thin-film thermoelectrics

Increasing microprocessor performance has historically been accompanied by increasing power and increasing on-chip power density, both of which present a cooling challenge. In this paper, the historical evolution of power is traced and the impact of power and power density on thermal solution designs is summarized. Industrial and academic researchers have correspondingly increased their focus on elucidating the problem and developing innovative solutions in devices, circuits, architectures, packaging and system level heatsinking. Examples of some of the current packaging and system thermal solutions are provided to illustrate the strategies used in their design. This is followed by a brief discussion of some of the future trends in demand and solution strategies that are being developed by academic and industrial researchers to meet these demands. Potential opportunities and limitations with these strategies are reviewed

Cooling a Microprocessor Chip

Two types of thermal management devices for efficiently dissipating heat generated by high performance electronic devices, such as microprocessors for desktop and server computers producing a power of near 200 Watts and high power electronic devices that are small and thin, such as those used in telephones, radios, laptop computers, and handheld devices. An integrated heat sink and spreader for cooling an item has a vapor chamber heat sink with a thinner first wall and a thicker second wall. The thicker second wall is engageable with the item in efficient heat transferring relationship. A plurality of heat-radiating fins are attached to the thinner first wall. An embedded direct heat pipe attachment includes a heat pipe embedded in a spreader plate that is in direct heat transferring contact with an item through a thin, uniform layer of thermal interface material.

Integrated vapor chamber heat sink and spreader and an embedded direct heat pipe attachment

A method and apparatus for cooling an electronics chip with a cooling plate having integrated micro channels and manifold/plenum made in separate single-crystal silicon or low-cost polycrystalline silicon. Forming the microchannels in the cooling plate is more economical than forming the microchannels directly into the back of the chip being cooled. In some embodiments, the microchannels are high-aspect-ratio grooves formed (e.g., by etching) into a polycrystalline silicon cooling base, which is then attached to a cover (to contain the cooling fluid in the grooves) and to the back of the chip.

Integrated micro channels and manifold/plenum using separate silicon or low-cost polycrystalline silicon

To accommodate high power densities associated with high performance integrated circuits, an integrated circuit package includes a heat-dissipating structure in which heat is dissipated from a surface of one or more dice (40) to an integrated heat spreader (IHS) through a high capacity thermal interface (110) formed of diamond, a diamond composite, or graphite. In one embodiment, a diamond layer is grown on the IHS lid (122). In another embodiment, a diamond layer is separately formed and affixed to the IHS. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.

Gregory M. Chrysler

Papers

On-chip cooling by superlattice-based thin-film thermoelectrics

Cooling a Microprocessor Chip

Integrated vapor chamber heat sink and spreader and an embedded direct heat pipe attachment

Integrated micro channels and manifold/plenum using separate silicon or low-cost polycrystalline silicon

Electronic assembly with high capacity thermal interface and methods of manufacture