/pdf/elementary-numerical-analysis-c3jwdaojjj.pdf

Elementary Numerical Analysis

This paper describes the design and implementation of fully integrated rectifiers in BiCMOS and standard CMOS technologies for rectifying an externally generated RF carrier signal in inductively powered wireless devices, such as biomedical implants, radio-frequency identification (RFID) tags, and smartcards to generate an on-chip dc supply. Various full-wave rectifier topologies and low-power circuit design techniques are employed to decrease substrate leakage current and parasitic components, reduce the possibility of latch-up, and improve power transmission efficiency and high-frequency performance of the rectifier block. These circuits are used in wireless neural stimulating microsystems, fabricated in two processes: the University of Michigan's 3-/spl mu/m 1M/2P N-epi BiCMOS, and the AMI 1.5-/spl mu/m 2M/2P N-well standard CMOS. The rectifier areas are 0.12-0.48 mm/sup 2/ in the above processes and they are capable of delivering >25mW from a receiver coil to the implant circuitry. The performance of these integrated rectifiers has been tested and compared, using carrier signals in 0.1-10-MHz range.

Fully integrated wideband high-current rectifiers for inductively powered devices

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

Innovative circuits and systems techniques are required to build advanced smart medical devices (SMD). The high reliability and very low power consumption are among the main criteria that must be given priority to implement in such implantable and wirelessly controlled microsystems. A typical device is composed of several integrated modules to be assembled on a thin substrate providing placement flexibility in the body. Monitoring of electrode-tissue interface condition is needed for enhanced safety, and for enabling troubleshooting after implantation. In order to improve controllability and observability, fully integrated binary phase-shift-keying (BPSK) demodulation combined with a passive modulation method allows full-duplex data high data rate communication between external controllers and implants. Case studies such as peripheral nerve interfaces to recuperate bladder functions, cortical multichannel stimulator, as well as cortical monitoring devices are reported.

Wireless smart implants dedicated to multichannel monitoring and microstimulation

During the past decades, research has progressed on the biomedical implantable electronic devices that require power and data communication through wireless inductive links. In this paper, we present a fully integrated binary phase-shift keying (BPSK) demodulator, which is based on a hard-limited COSTAS loop topology, dedicated to such implantable medical devices. The experimental results of the proposed demodulator show a data transmission rate of 1.12 Mbps, less than 0.7 mW consumption under a supply voltage of 1.8 V, and silicon area of 0.2 mm/sup 2/ in the Taiwan Semiconductor Manufacturing Company (TSMC) CMOS 0.18-/spl mu/m technology. The transmitter satisfies the requirement of applications relative to high forward-transferring data rate, such as cortical stimulation. Moreover, the employment of BPSK demodulation along with a passive modulation method allows full-duplex data communication between an external controller and the implantable device, which may improve the controllability and observability of the overall implanted system.

A fully integrated low-power BPSK demodulator for implantable medical devices

This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation (FES). The purpose of FES is to restore muscular control in disabled patients. The chip performs all the signal processing required in an implanted neural stimulator. The power and digital data transmission to the stimulator passes through a 5 MHz inductive link. From the signals transmitted to the stimulator, the chip is able to generate charge-balanced current pulses with a controllable length up to 256 μs and an amplitude up to 2 mA, for stimulation of nerve fibers. The quiescent current consumption of the chip is approx. 650 μA at supply voltages of 6–12 V, and its size is 3.9×3.5 mm^2. It has 4 output channels for use in a multipolar cuff electrode.

A Chip for an Implantable Neural Stimulator

An amplitude shift keying (ASK) demodulator is presented which is suitable for implantable electronic devices that are powered through an inductive link. The demodulator has been tested with carrier frequencies in the range 1-15 MHz, covering most commonly used frequencies. Data rates up to several 100kbit/s are supported, suitable for complex implants such as stimulating electrode arrays or visual implants. The circuit is compatible with modulation depths in the range 10-100%. The low end of the range permits data transmission without significant reduction in power transfer, or the use of transmitter designs with limited modulation capability. The power consumption is 60 μW from a 3 V supply. The circuit has been implemented in a standard CMOS process.

/pdf/a-low-power-ask-demodulator-for-inductively-coupled-59nix80wjd.pdf

A low-power ASK demodulator for inductively coupled implantable electronics

This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation. The chip performs all the signal processing required in an implanted neural stimulator. The power and signal transmission to the stimulator is carried out via an inductive link. From the signals transmitted to the stimulator, the chip is able to generate charge-balanced current pulses with a controllable length and amplitude for stimulation of nerve fibres. The chip has 4 output channels so that it can be employed in a cuff electrode with multiple connections to a nerve. The purpose of the functional electrical stimulation is to restore various bodily functions (e.g. motor functions) in patients who have lost them due to injury or disease.

/pdf/an-implantable-mixed-analog-digital-neural-stimulator-1kckkqy9je.pdf

An implantable mixed analog/digital neural stimulator circuit

Implanted transducers for functional electrical stimulation (FES) powered by inductive links are subject to conflicting requirements arising from low link efficiency, a low power budget and the need for protection of the weak signals against strong RF electromagnetic fields. We propose a solution to these problems by partitioning the RF transceiver and sensor/actuator functions onto separate integrated circuits. By amplifying measured neural signals directly at the measurements site and converting them into the digital domain before passing them to the transceiver the signal integrity is less likely to be affected by the inductive link. Neural stimulators are affected to a lesser degree, but still benefit from the partitioning. As a test case, we have designed a transceiver and a sensor chip which implement this partitioning policy. The transceiver is designed to operate in the 6.78 MHz ISM band and consumes approximately 360 /spl mu/W. Both chips were implemented in a standard 0.5 /spl mu/m CMOS technology, and use a 3 V supply voltage.

/pdf/a-distributed-transducer-system-for-functional-electrical-5dc86p3wxc.pdf

A distributed transducer system for functional electrical stimulation

1: Introduction. 2: Link design. 2.1. Circuit-level link description. 2.2. Electromagnetic view. 2.3. Coil design. 2.4. Transmitter design. 3: Receivers. 3.1. Requirements. 3.2. Basic single-ended receiver. 3.3. Low-power ASK demodulator. 4: Power supply management. 4.1. Shunt regulator. 4.2. Rectifiers. 4.3. Internal linear regulators. 4.4. Supply quality. 5: Reference circuits. 5.1. Bandgap references. 5.2. Bias signal generation. 5.3. Reset circuits. 6: Case studies. 6.1. Stimulator chip. 6.2. Two-chip system transceiver. Conclusion. Bibliography.

/pdf/cmos-circuit-design-for-rf-sensors-83mwj6ef67.pdf

Gunnar Gudnason

Papers

A Chip for an Implantable Neural Stimulator

A low-power ASK demodulator for inductively coupled implantable electronics

An implantable mixed analog/digital neural stimulator circuit

A distributed transducer system for functional electrical stimulation

CMOS Circuit Design for RF Sensors