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Author

Guo Xiaoqiang

Bio: Guo Xiaoqiang is an academic researcher. The author has contributed to research in topics: Modulation. The author has an hindex of 1, co-authored 1 publications receiving 7 citations.
Topics: Modulation

Papers
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Patent
Liu Fangcheng1, Xin Kai1, Guo Haibin
05 Jun 2018
TL;DR: In this paper, a controller is provided to change the change rate of a common-mode component of a three-phase converter upon a change of a converter modulation degree, thereby improving stability and harmonic characteristics of the three phase converter and implementing flexible adaptive adjustment.
Abstract: A pulse width modulation method, a pulse width modulation system, and a controller are provided, which change a change rate of a common-mode component of a three-phase converter upon a change of a converter modulation degree, thereby improving stability and harmonic characteristics of the three-phase converter and implementing flexible adaptive adjustment. An example pulse width modulation method includes: obtaining initial three-phase modulation waves and a converter modulation degree; calculating a common-mode-component change-rate adjustment coefficient based on preset modulation parameters and the converter modulation degree; selecting a modulation wave having a minimum absolute value from the modulation wave set as a common-mode modulation wave; and performing waveform superposition on the initial three-phase modulation waves and the common-mode modulation wave to obtain output three-phase modulation waves.

5 citations

Patent
22 Jul 2015
TL;DR: In this article, a digital-analog combined SVPWM (space vector pulse width modulation) method is proposed for electric transmission and control, which includes the steps of a, judging a sector of an instruction space vector; b, calculating acting time of a conventional SVP vector; c, calculating on-off time of each phase of pulse; d, according to hardware carrier features, subjecting waveform of the onoff time calculated in the former step to output setting, allowing outputting to a hardware board, and generating PWM through carrier comparison.
Abstract: The invention relates to the technical field of electric transmission and control, in particular to a digital-analog combined SVPWM (space vector pulse width modulation) method The method includes the steps of a, judging a sector of an instruction space vector; b, calculating acting time of a conventional space vector; c, calculating on-off time of each phase of pulse; d, according to hardware carrier features, subjecting waveform of the on-off time calculated in the former step to output setting, allowing outputting to a hardware board, and generating PWM through carrier comparison The method has the advantages that implementation base on a common digital controller and a common hardware carrier modulation board needs no high-performance digital processor having PWM generation related hardware resources, thus cost is reduced; algorithm upgrading is facilitated for part of existing power electronic converter control systems, upgrading cost is reduced, and upgrading period is shortened

4 citations

Patent
30 Mar 2016
TL;DR: In this paper, a Z-source three-level inverter with an intelligent power module is presented, which consists of a voltage dividing capacitor, a first diode, a second diode D1, an X-shaped impedance network and a bidirectional converter.
Abstract: Disclosed in the invention is a Z-source three-level inverter connected with an intelligent power module. The intelligent power module is connected with a permanent magnet synchronous motor. The Z-source three-level inverter consists of a voltage dividing capacitor, a first diode D1, a second diode D2, an X-shaped impedance network and a bidirectional converter. The bidirectional converter employs a half-bridge two-bridge-arm diode clamp three-level topological structure. Therefore, the low current and high network-entering current quality are realized; the voltage-withstanding level can be improved based on rectification; the alternating-current harmonic voltage and current are reduced; and the power factor is improved. Besides, the structures of the inverter and the system are simple and the efficiencies are high; the good disturbance suppression capability is good; and the steady-state error in the output current can be eliminated.

3 citations

Patent
20 Aug 2014
TL;DR: In this article, an improved anti-phase laminated carrier wave modulation method for a Z-source tri-level inverter is presented, and the defect that the direct duty ratio is badly controlled in the prior art is overcome due to an upper direct state and a lower direct state.
Abstract: Provided is an improved anti-phase laminated carrier wave modulation method for a Z-source tri-level inverter. The Z-source tri-level inverter comprises a DC source. The anode of the DC source is electrically connected with the anode of a first diode and one pole of a first capacitor, the cathode of the DC source is electrically connected with the cathode of a second diode and one pole of a second capacitor, the other pole of the first capacitor is electrically connected with the other pole of the second capacitor, the cathode of the first diode and the anode of the second diode are both electrically connected with a Z-source network, the Z-source network is electrically connected with a three-phase inversion bridge, and the three-phase inversion bridge is electrically connected with three phases of symmetrical loads. Thus, the defect that the direct duty ratio is badly controlled in the prior art is overcome due to an upper direct state and a lower direct state.

3 citations

Patent
13 Jul 2018
TL;DR: In this paper, a frequency-tripling carrier phase shift modulation method was proposed for a hybrid cascaded H-bridge multilevel inverter with a voltage ratio of 1:1:3:3.
Abstract: The invention discloses a frequency-tripling carrier phase shift modulation method suitable for a hybrid cascaded H-bridge multilevel inverter with a voltage ratio of 1:1:3:3. The method comprises thesteps of firstly taking an absolute value of a reference sine signal vref to obtain a modulated signal vm, comparing the modulated signal vm with primary triangular carrier signals vca and vcb, auxiliary triangular carrier signals vcr1, vcr2, vcr3 and vcr4 and a voltage constant value 3E to obtain seven logic pulse signals A, B, R1, R2, R3, R and P and comparing the reference sine signal vref with zero voltage to obtain a polar pulse signal D; and then generating an optimized PWM drive signal from the seven logic pulse signals and the polar pulse signal through a drive logic allocation unit.According to the method disclosed by the invention, the condition that the multilevel inverter achieves increase of output levels of the inverter and a frequency-tripling function of output voltage through adding two auxiliary units under the condition of meeting balanced power distribution of a main power unit can be ensured.

1 citations