This paper shows a generic and simple conversion from weak asymmetric and symmetric encryption schemes into an asymmetric encryption scheme which is secure in a very strong sense- indistinguishability against adaptive chosen-ciphertext attacks in the random oracle model. In particular, this conversion can be applied efficiently to an asymmetric encryption scheme that provides a large enough coin space and, for every message, many enough variants of the encryption, like the ElGamal encryption scheme.

Secure integration of asymmetric and symmetric encryption schemes

Efficient implementations of lattice-based cryptographic schemes have been limited to only the most basic primitives like encryption and digital signatures. The main reason for this limitation is that at the core of many advanced lattice primitives is a trapdoor sampling algorithm (Gentry, Peikert, Vaikuntanathan, STOC 2008) that produced outputs that were too long for practical applications. In this work, we show that using a particular distribution over NTRU lattices can make GPV-based schemes suitable for practice. More concretely, we present the first lattice-based IBE scheme with practical parameters – key and ciphertext sizes are between two and four kilobytes, and all encryption and decryption operations take approximately one millisecond on a moderately-powered laptop. As a by-product, we also obtain digital signature schemes which are shorter than the previously most-compact ones of Ducas, Durmus, Lepoint, and Lyubashevsky from Crypto 2013.

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E fficient Identity-Based Encryption over NTRU Lattices.

Homomorphic encryption (HE)---the ability to perform computation on encrypted data---is an attractive remedy to increasing concerns about data privacy in deep learning (DL). However, building DL models that operate on ciphertext is currently labor-intensive and requires simultaneous expertise in DL, cryptography, and software engineering. DL frameworks and recent advances in graph compilers have greatly accelerated the training and deployment of DL models to various computing platforms. We introduce nGraph-HE, an extension of nGraph, Intel's DL graph compiler, which enables deployment of trained models with popular frameworks such as TensorFlow while simply treating HE as another hardware target. Our graph-compiler approach enables HE-aware optimizations- implemented at compile-time, such as constant folding and HE-SIMD packing, and at run-time, such as special value plaintext bypass. Furthermore, nGraph-HE integrates with DL frameworks such as TensorFlow, enabling data scientists to benchmark DL models with minimal overhead.

nGraph-HE: a graph compiler for deep learning on homomorphically encrypted data

Distributed Ledger Technologies (DLTs) and blockchain systems have received enormous academic, government, and commercial interest in recent years. This article surveys the integration of DLTs within another life-changing technology, the Internet of Things (IoT). IoT-based applications, such as smart home, smart transport, supply chain, smart healthcare, and smart energy, promise to boost the efficiency of existing infrastructures and change every facet of our daily life. This article looks into the challenges faced by such applications and reviews a comprehensive selection of existing DLT solutions to those challenges. We also identify issues for future research, including DLT security and scalability, multi-DLT applications, and survival of DLT in the post-quantum world.

Applications of Distributed Ledger Technologies to the Internet of Things: A Survey

Quantum computing is an emerging paradigm with the potential to offer significant computational advantage over conventional classical computing by exploiting quantum-mechanical principles such as entanglement and superposition. It is anticipated that this computational advantage of quantum computing will help to solve many complex and computationally intractable problems in several areas such as drug design, data science, clean energy, finance, industrial chemical development, secure communications, and quantum chemistry. In recent years, tremendous progress in both quantum hardware development and quantum software/algorithm have brought quantum computing much closer to reality. Indeed, the demonstration of quantum supremacy marks a significant milestone in the Noisy Intermediate Scale Quantum (NISQ) era - the next logical step being the quantum advantage whereby quantum computers solve a real-world problem much more efficiently than classical computing. As the quantum devices are expected to steadily scale up in the next few years, quantum decoherence and qubit interconnectivity are two of the major challenges to achieve quantum advantage in the NISQ era. Quantum computing is a highly topical and fast-moving field of research with significant ongoing progress in all facets. This article presents a comprehensive review of quantum computing literature, and taxonomy of quantum computing. Further, the proposed taxonomy is used to map various related studies to identify the research gaps. A detailed overview of quantum software tools and technologies, post-quantum cryptography and quantum computer hardware development to document the current state-of-the-art in the respective areas. We finish the article by highlighting various open challenges and promising future directions for research.

Quantum Computing: A Taxonomy, Systematic Review and Future Directions

The advent of quantum computing threatens to break many classical cryptographic schemes, leading to innovations in public key cryptography that focus on post-quantum cryptography primitives and protocols resistant to quantum computing threats. Lattice-based cryptography is a promising post-quantum cryptography family, both in terms of foundational properties as well as in its application to both traditional and emerging security problems such as encryption, digital signature, key exchange, and homomorphic encryption. While such techniques provide guarantees, in theory, their realization on contemporary computing platforms requires careful design choices and tradeoffs to manage both the diversity of computing platforms (e.g., high-performance to resource constrained), as well as the agility for deployment in the face of emerging and changing standards. In this work, we survey trends in lattice-based cryptographic schemes, some recent fundamental proposals for the use of lattices in computer security, challenges for their implementation in software and hardware, and emerging needs for their adoption. The survey means to be informative about the math to allow the reader to focus on the mechanics of the computation ultimately needed for mapping schemes on existing hardware or synthesizing part or all of a scheme on special-purpose har dware.

Post-Quantum Lattice-Based Cryptography Implementations: A Survey

Quantum computers promise to solve hard mathematical problems such as integer factorization and discrete logarithms in polynomial time, making standardized public-key cryptosystems insecure. Lattice-Based Cryptography (LBC) is a promising post-quantum public key cryptographic protocol that could replace standardized public key cryptography, thanks to the inherent post-quantum resistant properties, efficiency, and versatility. A key mathematical tool in LBC is the Number Theoretic Transform (NTT), a common method to compute polynomial multiplication. It is the most compute-intensive routine and requires acceleration for practical deployment of LBC protocols. In this paper, we propose CryptoPIM, a high-throughput Processing In-Memory (PIM) accelerator for NTT-based polynomial multiplier with the support of polynomials with degrees up to 32k. Compared to the fastest FPGA implementation of an NTT-based multiplier, CryptoPIM achieves on average 31x throughput improvement with the same energy and only 28% performance reduction, thereby showing promise for practical deployment of LBC.

CryptoPIM: In-memory Acceleration for Lattice-based Cryptographic Hardware

Quantum computers threaten to break public-key cryptography schemes such as DSA and ECDSA in polynomial time, which poses an imminent threat to secure signal processing. Ring learning with error (RLWE) lattice-based cryptography (LBC) is one of the most promising families of post-quantum cryptography (PQC) schemes in terms of efficiency and versatility. Two conventional methods to compute polynomial multiplication, the most compute-intensive routine in the RLWE schemes, are convolutions and Number Theoretic Transform (NTT).In this work, we explore the energy efficiency of polynomial multiplier using systolic architecture for the first time. As an early exploration, we design two high-throughput systolic array polynomial multipliers, including NTT-based and convolution-based, and compare them to our low-cost sequential (non-systolic) NTT-based multiplier. Our sequential NTT-based multiplier achieves 3x speedup over the state-of-the-art FGPA implementation of the polynomial multiplier in the NewHope-Simple key exchange mechanism on a low-cost Artix7 FPGA. When synthesized on a Zynq UltraScale+ FPGA, the NTT-based systolic and convolution-based systolic designs achieve on average 1.7x and 7.5x speedup over our sequential NTT-based multiplier respectively, which can lead to generating over 2x more signatures per second by CRYSTALS-Dilithium, a PQC digital signature scheme. These explorations help designers select the right PQC implementations for making future signal processing applications quantum-resistant.

Exploring Energy Efficient Quantum-resistant Signal Processing Using Array Processors.

In this work, we propose methods to design flexible and energy-efficient hardware accelerators for ring learning with error (RLWE) lattice-based cryptographic protocols, such as key agreement and digital signature. We apply the proposed methods to design the first programmable DMA-based family of accelerators for the Number Theoretic Transform (NTT), a commonly used kernel inside variants of RLWE protocols NewHope and Kyber. We validate our methods by integrating the accelerators into an HLS-based System on Chip (SoC) simulator. Experiments confirm the suitability of the flexible DMA-based accelerators for their use as part of lattice-based schemes. Our proposed designs are capable of executing new variants of lattice-based schemes with superior energy efficiency compared to executing the scheme entirely on the main processor, but without modifying the hardware acceleration platform. Performance improvements are up to 2x, energy consumption improves up to 1.9x, and energy-delay product (EDP) improves up to 3.9x. Together with such improved energy efficiency and performance, the flexibility inherent in our accelerators provides insights for, while reducing the risk of early adoption of lattice-based PQC cryptographic protocols in hardware products.

Flexible NTT Accelerators for RLWE Lattice-Based Cryptography

Deep Neural Network (DNN) accelerators provide high-accuracy data recognition that are commonly used in edge devices. However, resource constrained edge devices usually have small form factors and limited amounts of resources, whereas DNN accelerators require large amounts of computations and memory footprint. In particular, the memory requirements of DNNs become a major bottleneck for realization of accelerators on small footprint devices. To reduce the memory footprint, fused-layer convolutional neural network (CNN) accelerators have been proposed for image recognition networks. Fused-layer CNNs reduce off-chip memory accesses by executing a set of CNN layers on-chip and by replacing the off-chip memory accesses with on-chip memory accesses between the layers. Although fused-layer CNNs reduce the off-chip memory accesses, they still require large amounts of on-chip memories that occupy significant chip area, making impractical their realization on small footprint devices. We address this problem by proposing a design technique that generates fused-CNN accelerators with small memory footprints, demonstrate its potential via a case study.

Hamid Nejatollahi

Papers

Post-Quantum Lattice-Based Cryptography Implementations: A Survey

CryptoPIM: In-memory Acceleration for Lattice-based Cryptographic Hardware

Exploring Energy Efficient Quantum-resistant Signal Processing Using Array Processors.

Flexible NTT Accelerators for RLWE Lattice-Based Cryptography

Small Memory Footprint Neural Network Accelerators