Showing papers by "Hans Ertl published in 2020"

Output Impedance Compensation of a Cascaded Advanced AC-Simulator

Abstract: For testing grid connected components usually an AC power source and external passive components such as inductors and resistors are used. In order to improve the power density of such a system a concept of a cascaded advanced AC-simulator with virtual output impedance has been proposed. Such a system consists of a large signal and a small signal inverter, which are connected in series to emulate arbitrary grid characteristics, like voltage dips, frequency profiles, harmonics and grid impedance. This concept shows some advantages in terms of small signal bandwidth and measurement accuracy. While the large signal inverter merely has to provide the fundamental voltages, the small signal inverter emulates the voltage drop of the virtual impedance as well as harmonics with higher dynamic. Since the expected output voltage of the small signal inverter is much lower compared to the fundamental signals, fast switching MOSFETs with lower Drain-Source voltage can be implemented. However, for small virtual impedance values the output impedance of the large signal generator cannot be neglected and has to considered or compensated. One approach is to compensate the output impedance of the large signal inverter within the control system of the small signal inverter. The implementation and verification of such a compensation concept for a cascaded AC-Simulator with virtual output impedance is presented in this work.

Analysis and Verification of a Cascaded Advanced AC-Simulator with Non-Linear Loads

Abstract: A cascaded advanced AC-simulator system for testing grid tied applications has been introduced recently. Such a system emulates a virtual impedance, which is implemented in the control loop to simulate a certain grid impedance. Therefore a small signal inverter is used in addition to a large signal inverter, which generates the fundamental voltage signal. Since the small signal inverter operates at lower DC-link voltages, fast switching devices can be used for the design. This enables high bandwidth and fast dynamics and on the other hand high accuracy of the voltage measurements. As both inverter systems are connected in series a galvanic isolation is mandatory and realized by a YY0 transformer. However, the output impedance of the large signal inverter and the stray inductance of the transformer have impact on the measurement results, these impedance characteristics have to be considered and compensated. This compensation can be done by the small signal inverter in addition to the impedance emulation. The behavior and accuracy of such a system with non-linear loads is going to be discussed in detail in this work. Based on the analysis of bridge rectifiers and the limitations of the proposed topology, an appropriate laboratory test setup is implemented. The measurement results are analyzed and compared to an ideal reference model. The analysis is done in the time domain and in the frequency domain with focus on Fast Fourier Transformation (FFT).