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Author

Hany A.M. Amin

Bio: Hany A.M. Amin is an academic researcher. The author has contributed to research in topics: Trojan & Hardware Trojan. The author has an hindex of 1, co-authored 1 publications receiving 23 citations.

Papers
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Journal ArticleDOI
TL;DR: Simulation results show that the proposed method achieves higher probability of Trojan detection over a naive implementation of simple voting on the output of different IP cores, and requires less hardware overhead when compared with a simple voting technique achieving the same degree of security.

26 citations


Cited by
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Proceedings ArticleDOI
01 Aug 2015
TL;DR: This paper provides a detailed analysis on how delay variations can lead to non-ideal behavior of control paths in 3-D ICs and demonstrates that a hardware intruder can leverage this phenomenon to trigger the payload, without requiring a separate triggering circuit.
Abstract: Hardware security is a major concern in the intellectual property (IP) centric integrated circuits (IC). 3-D IC design augments IP centric designs. However, 3-D ICs suffer from high temperatures in their middle tiers due to long heat dissipation paths. We anticipate that this problem would exacerbate the hardware security issues in 3-D ICs. Because, high temperature leads to undesired timing characteristics in ICs. In this paper we provide a detailed analysis on how these delay variations can lead to non-ideal behavior of control paths. It is demonstrated that a hardware intruder can leverage this phenomenon to trigger the payload, without requiring a separate triggering circuit. Our simulation results show that a state machine can lead to temporary glitches long enough to cause malfunctioning at temperatures of 87°C or above, under nominal frequencies. The overall area overhead of the payload compared to a very small Mod-3 counter is 6%.

20 citations

Proceedings ArticleDOI
01 Jan 2017
TL;DR: This work proposes a self aware approach which works on the observe-decide-act (ODA) paradigm to counteract the effects of Trojans, which may induce sudden unintentional delays at runtime, affecting the basic security principles of the SoC.
Abstract: A major issue of present age system on chip (SoC) designing is meeting of stringent time to market deadlines along with the reduction of various challenges faced during design. A significant strategy adopted in tackling such a problem is to procure different components or IPs (intellectual properties) of the SoC from different third party IP vendors (3PIPs). Such a technique targets independent working of the SoC components and removes the threat of the occurrence of malicious circuitry or Hardware Trojan Horse (HTH) having a distributed architecture. However, trustworthiness of the 3PIP vendors is a concern and possibility exists in the implantation of a HTH in the individual IPs procured from them. In this work, we analyze the effects of such Trojans, which may induce sudden unintentional delays at runtime, affecting the basic security principles of the SoC. We propose a self aware approach which works on the observe-decide-act (ODA) paradigm to counteract the scenario. Existing literature on hardware security generally focus on detection of anomaly, but is silent on organizing low level security mechanisms in such a manner that the high level objective of secure task completion is facilitated at run time. Our proposed methodology not only overcomes this limitation but also ensures security without tampering the IP designs. Experimental analysis is performed using AES crypto SoC architecture. Low overhead in area and power of the security elements as obtained in experimentation supports its applicability for practical SoC applications.

17 citations

Journal ArticleDOI
Kai Huang1, Yun He1
TL;DR: The relation between combinational 0/1-controllability and 0/ 1-probability is revealed and a static transition probability analysis based on the proposed difference-amplified controllability is proposed, which can be easily obtained by the Sandia Controllability/Observability Analysis Program.
Abstract: To remain dormant in the validation and manufacturing test, Trojans tend to have at least one trigger signal at the gate-level netlist with a very low transition probability. Our paper exploits this stealthy nature of trigger signals to detect Trojans using static and dynamic transition probabilities. The proposed trigger identification is a reference-free scheme, and no prior knowledge of a Trojan-free design is required. First, we reveal the relation between combinational 0/1-controllability and 0/1-probability and propose a static transition probability analysis based on our proposed difference-amplified controllability, which can be easily obtained by the Sandia Controllability/Observability Analysis Program. The k-means clustering method is adopted for potential trigger classification to extend the scalability and adaptability to different circuit sizes. Second, we propose to utilize the transition probability of a dynamic simulation for correction of the results. Experiments show that the proposed detection scheme can obtain a 0% false negative rate and a maximum 11.7% false positive rate on Trust-HUB benchmarks.

16 citations