Heng-Yuan Lee

Bio: Heng-Yuan Lee is an academic researcher from Industrial Technology Research Institute. The author has contributed to research in topics: Resistive random-access memory & Non-volatile memory. The author has an hindex of 27, co-authored 94 publications receiving 4576 citations. Previous affiliations of Heng-Yuan Lee include National Tsing Hua University & Minghsin University of Science and Technology.

Metal–Oxide RRAM

Abstract: In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

Abstract: Several emerging nonvolatile memories (NVMs) including phase-change RAM (PCRAM) [1–3], MRAM [4–5], and resistive RAM (RRAM) [6–8] have achieved faster operating speeds than embedded Flash. Among those emerging NVMs, RRAM has advantages in faster write time, a larger resistance-ratio (R-ratio), and smaller write power consumption. However, RRAM cells have large cross-die and within-die resistance variations (R-variations) and require low read-mode bitline (BL) bias voltage (V BL-R ) to prevent read disturbance. This work proposes process/resistance variation-insensitive read schemes for embedded RRAM to achieve fast read speeds with high yields. An embedded mega-bit scale (4Mb), single-level-cell (SLC) RRAM macro with sub-8ns read-write random-access time is presented. Multi-level-cell (MLC) operation with 160ns write-ver-ify operation is demonstrated.

Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity

Abstract: A 30×30 nm2 HfO x resistance random access memory (RRAM) with excellent electrical performances is demonstrated for the scaling feasibility in this work. A 1 Kb one transistor and one resistor (1T1R) array with robust characteristics was also fabricated successfully. The device yield of the 1 Kb array is 100%, and the endurance for these devices can exceed 106 cycles by a pulse width of 40 ns. Two effective verification methods, which make a tight distribution of high resistance (R HIGH ) and low resistance (R LOW ) are proposed for the array to ensure a good operation window. A thin AlO x buffer layer under the HfO x layer was adopted to enhance the read disturb immunity. Without large parasitic capacitance, the 1T1R RRAM devices exhibit excellent program(PGM)/erase(ERS) disturb immunity.

Low-Power Switching of Nonvolatile Resistive Memory Using Hafnium Oxide

Abstract: Nonstoichiometric hafnium oxide (HfOx) resistive-switching memory devices with low-power operation have been demonstrated. Polycrystalline HfOx (O:Hf=1.5:1) films with a thickness of 20 nm are grown on a titanium nitride (TiN) bottom electrode by commercial atomic layer deposition. Platinum (Pt) as a top electrode is used in the memory device. Voltage-induced resistance switching is repeatedly observed in the Pt/HfOx/TiN/Si memory device with resistance ratio is greater than 10. During the switching cycles, the power consumptions for high- and low-resistance states are found to be 0.25 and 0.15 mW, respectively. At 85 °C, the memory device shows stable resistance switching and superior data retention with resistance ratio is greater than 100. In addition, our memory device shows little area dependence of resistance-switching behavior. The anodic electrode containing noble metal Pt serves an important role in maintaining stable resistance switching. The resistance switching in the HfOx films is thought to be due to the defects that are generated by the applied bias. The nonstoichiometric HfOx films are responsible for the low SET and RESET currents during switching. Our study shows that the HfOx resistive-switching memory is a promising candidate for next-generation nonvolatile memory device applications.

Method of manufacturing charge storage device

Abstract: A method of manufacturing a charge storage device is provided. Utilizing the capacity for a precise control of the thickness and the silicon content of a deposited film in an atomic layer deposition process, a stacked gradual material layer such as a hafnium silicon oxide (Hf x Si y O z ) layer is formed. The silicon content is gradually changed throughout the duration of the Hf x Si y O z deposition process. The etching rate for the Hf x Si y O z layer in dilute hydrogen fluoride solution is dependent on the silicon content y in the Hf x Si y O z layer. The sidewalls of the stacked gradual material layer are etched to form an uneven profile. The lower electrode, the capacitor dielectric layer and the upper electrode are formed on the uneven sidewalls of the stacked gradual material layers, the area between the lower electrode and the upper electrode is increased to improve the capacitance of the charge storage device.

Memristive devices for computing

Abstract: Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.

Metal–Oxide RRAM

Abstract: In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors

Abstract: Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Semiconductor device, and manufacturing method thereof

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.