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Hideto Miyake

Bio: Hideto Miyake is an academic researcher from Sumitomo Chemical. The author has contributed to research in topics: Nitride & Semiconductor. The author has an hindex of 4, co-authored 6 publications receiving 86 citations.

Papers
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Patent
23 Mar 2001
TL;DR: In this article, a re-growing process using a mask pattern was proposed, and threading dislocations in the re-grown layer were terminated by the voids formed on the pattern.
Abstract: Provided is a method of producing a group III-V compound semiconductor having a low dislocation density without increasing the thickness of a re-grown layer, the method includes a re-growing process using a mask pattern, and threading dislocations in the re-grown layer are terminated by the voids formed on the pattern.

37 citations

Patent
02 May 2006
TL;DR: In this article, a group 3-5 nitride semiconductor multilayer substrate and a method for manufacturing such a substrate are provided, where a semiconductor layer (12) is formed on a base substrate, and a mask (13) is created on the mask by selective growing.
Abstract: A group 3-5 nitride semiconductor multilayer substrate ( 1 ) and a method for manufacturing such substrate are provided. A semiconductor layer ( 12 ) is formed on a base substrate ( 11 ), and a mask ( 13 ) is formed on the semiconductor layer ( 12 ). Then, after forming a group 3-5 nitride semiconductor crystalline layer ( 14 ) by selective growing, the group 3-5 nitride semiconductor crystalline layer ( 14 ) and the base substrate ( 11 ) are separated. The crystallinity of the semiconductor layer ( 12 ) is lower than that of the group 3-5 nitride semiconductor crystalline layer ( 14 ).

27 citations

Patent
10 Mar 2000
TL;DR: In this paper, a III-V compound semiconductor having a layer formed from a first III-v compound semiconductors expressed by the general formula InuGavAlwN (where u+v+w=1) was described, where the full width at half maximum of the (0004) reflection X-ray rocking curve of the second III-vectors was 700 seconds or less regardless of the direction of X-rays incidence.
Abstract: Provided is a III-V compound semiconductor having a layer formed from a first III-V compound semiconductor expressed by the general formula InuGavAlwN (where 0≦u≦1, 0≦v≦1, 0≦w≦1, u+v+w=1), a pattern formed on the layer from a material different not only from the first III-V compound semiconductor but also from a second III-V compound semiconductor hereinafter described, and a layer formed on the first III-V compound semiconductor and the pattern from the second III-V compound semiconductor expressed by the general formula InxGayAlzN (where 0≦x≦1, 0≦y≦1, 0≦x≦1, x+y+z=1), wherein the full width at half maximum of the (0004) reflection X-ray rocking curve of the second III-V compound semiconductor is 700 seconds or less regardless of the direction of X-ray incidence. In the III-V compound semiconductor, which is a high quality semiconductor, the occurrence of low angle grain boundaries is suppressed.

13 citations

Patent
26 Mar 2003
TL;DR: In this paper, the III-V Group nitride compound semiconductor (InxGayAlzN) was improved by making the deposition pressure not lower than 800 Torr and the defect density reduced.
Abstract: When a crystal layer of III-V Group nitride compound semiconductor is formed, a nitride compound semiconductor layer is first overlaid on a substrate to form a base layer and a III-V Group nitride compound semiconductor represented by the general formula InxGayAlzN (where 0≦x≦1, 0≦y≦1, 0≦z≦1, x+y+z=1) is epitaxially grown on the base layer by hydride vapor phase epitaxy at a deposition pressure of not lower than 800 Torr. By making the deposition pressure not lower than 800 Torr, the crystallinity of the III-V Group nitride compound semiconductor can be markedly improved and its defect density reduced.

5 citations

Patent
10 Mar 2000
TL;DR: In this paper, an indium-gallium-aluminum-nitride-based III-V compound semiconductor with an interposed pattern of different material for low angle grain boundary suppression is presented.
Abstract: III-V compound semiconductor comprises two indium-gallium-aluminum nitride based semiconductor layers with an interposed pattern of different material for low angle grain boundary suppression. A III-V compound semiconductor comprises: (a) a layer of a first III-V compound semiconductor of formula InuGavAlwN (u = 0 to 1, v = 0 to 1, w = 0 to 1 and u + v + w = 1); (b) a pattern of a material which differs from both the first III-V compound semiconductor and a second III-V compound semiconductor; and (c) a layer of a second III-V compound semiconductor of formula InxGayAlzN (x = 0 to 1, y = 0 to 1, z = 0 to 1 and x + y + z = 1) having a (0004) reflection half-height width on its x-ray vibration curve of <= 700 arc seconds independently of the x-ray incidence angle. Independent claims are also included for the following: (i) a similar III-V compound semiconductor, in which the second III-V compound semiconductor layer is not in contact with the upper face of the pattern; (ii) an electronic device comprising the above III-V compound semiconductor; and (iii) a light emitting device comprising the above III-V compound semiconductor.

3 citations


Cited by
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Patent
17 May 2006
TL;DR: In this paper, the fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations is discussed.
Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

326 citations

Patent
25 Jul 2008
TL;DR: In this article, a semiconductor light-emitting device is described, which consists of a first electrode layer, an insulating layer, a second electrode layer and an active layer that are sequentially stacked on a substrate.
Abstract: A semiconductor light-emitting device, and a method of manufacturing the same. The semiconductor light-emitting device includes a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked on a substrate, a first contact that passes through the substrate to be electrically connected to the first electrode layer, and a second contact that passes through the substrate, the first electrode layer, and the insulating layer to communicate with the second electrode layer. The first electrode layer is electrically connected to the first semiconductor layer by filling a contact hole that passes through the second electrode layer, the second semiconductor layer, and the active layer, and the insulating layer surrounds an inner circumferential surface of the contact hole to insulate the first electrode layer from the second electrode layer.

260 citations

Patent
13 Jun 2008
TL;DR: In this paper, a dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer is formed above a buffer layer having a lattice constant similar to a InP.
Abstract: Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP.

190 citations

Patent
26 Mar 2002
TL;DR: In this paper, a GaN layer 2 on a sapphire substrate was constructed by heat-treating the substrate in an atmosphere containing hydrogen gas or a gas of a compound containing hydrogen to form voids.
Abstract: To provide a semiconductor substrate of a group III nitride with low defect density and little warp, this invention provides a process comprising such steps of: forming a GaN layer 2 on a sapphire substrate 1 of the C face ((0001) face); forming a titanium film 3 thereon; heat-treating the substrate in an atmosphere containing hydrogen gas or a gas of a compound containing hydrogen to form voids in the GaN layer 2; and thereafter forming a GaN layer 4 on the GaN layer 2′.

152 citations

Patent
07 Sep 2007
TL;DR: In this article, a lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls were formed by formation of facets that direct dislocations in the films to the sidewalls.
Abstract: Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls.

120 citations